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STK10C68-5LF55 参数 Datasheet PDF下载

STK10C68-5LF55图片预览
型号: STK10C68-5LF55
PDF下载: 下载PDF文件 查看货源
内容描述: 8K ×8的nvSRAM QuantumTrap⑩ CMOS非易失性静态RAM [8K x 8 nvSRAM QuantumTrap⑩ CMOS Nonvolatile Static RAM]
分类和应用: 静态存储器
文件页数/大小: 12 页 / 471 K
品牌: SIMTEK [ SIMTEK CORPORATION ]
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STK10C68
ABSOLUTE MAXIMUM RATINGS
a
Voltage on Input Relative to Ground . . . . . . . . . . . . . .–0.5V to 7.0V
Voltage on Input Relative to V
SS
. . . . . . . . . . –0.6V to (V
CC
+ 0.5V)
Voltage on DQ
0-7
. . . . . . . . . . . . . . . . . . . . . . –0.5V to (V
CC
+ 0.5V)
Temperature under Bias . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W
DC Output Current (1 output at a time, 1s duration) . . . . . . . . 15mA
Note a: Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at condi-
tions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rat-
ing conditions for extended periods may affect reliability.
DC CHARACTERISTICS
COMMERCIAL
SYMBOL
I
CC1
b
PARAMETER
MIN
Average V
CC
Current
MAX
85
75
65
N/A
3
10
27
23
20
N/A
750
±1
±5
2.2
V
SS
– .5
2.4
0.4
0
70
–40/-55
V
CC
+ .5
0.8
2.2
V
SS
– .5
2.4
0.4
85/125
INDUSTRIAL/
MILITARY
MIN
MAX
90
75
65
55
3
10
28
24
21
20
1500
±1
±5
V
CC
+ .5
0.8
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
μA
μA
V
V
V
V
°C
UNITS
(V
CC
= 5.0V
±
10%)
NOTES
t
AVAV
= 25ns
t
AVAV
= 35ns
t
AVAV
= 45ns
t
AVAV
= 55ns
All Inputs Don’t Care, V
CC
= max
W
(V
CC
– 0.2V)
All Others Cycling, CMOS Levels
t
AVAV
= 25ns, E
V
IH
t
AVAV
= 35ns, E
V
IH
t
AVAV
= 45ns, E
V
IH
t
AVAV
= 55ns, E
V
IH
E
(V
CC
– 0.2V)
All Others V
IN
0.2V or
(V
CC
– 0.2V)
V
CC
= max
V
IN
= V
SS
to V
CC
V
CC
= max
V
IN
= V
SS
to V
CC
, E or G
V
IH
All Inputs
All Inputs
I
OUT
= – 4mA
I
OUT
= 8mA
I
CC2
c
I
CC3
b
I
SB1
d
Average V
CC
Current during
STORE
Average V
CC
Current at t
AVAV
= 200ns
5V, 25°C, Typical
Average V
CC
Current
(Standby, Cycling TTL Input Levels)
I
SB2
d
I
ILK
I
OLK
V
IH
V
IL
V
OH
V
OL
T
A
V
CC
Standby Current
(Standby, Stable CMOS Input Levels)
Input Leakage Current
Off-State Output Leakage Current
Input Logic “1” Voltage
Input Logic “0” Voltage
Note a: Output Logic “1” Voltage
Output Logic “0” Voltage
Operating Temperature
Note b: I
CC1
and I
CC3
are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
Note c: I
CC2
is the average current required for the duration of the
STORE
cycle (t
STORE
) .
Note d: E
V
IH
will not produce standby current levels until any nonvolatile cycle in progress has timed out.
AC TEST CONDITIONS
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 3V
Input Rise and Fall Times
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤
5ns
Input and Output Timing Reference Levels . . . . . . . . . . . . . . . 1.5V
Output Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Figure 1
5.0V
480 Ohms
OUTPUT
255 Ohms
CAPACITANCE
e
SYMBOL
C
IN
C
OUT
PARAMETER
Input Capacitance
Output Capacitance
(T
A
= 25
°
C, f = 1.0MHz)
MAX
8
7
UNITS
pF
pF
CONDITIONS
ΔV
= 0 to 3V
ΔV
= 0 to 3V
30 pF
INCLUDING
SCOPE AND
FIXTURE
Note e: These parameters are guaranteed but not tested.
Figure 1: AC Output Loading
March 2006
2
Document Control # ML0006 rev 0.2