STK14D88
V
CAP
NC
A
14
A
12
A
7
A
6
A
5
NC
A
4
NC
NC
NC
V
SS
NC
NC
DQ
0
A
3
A
2
A
1
A
0
DQ
1
DQ
2
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
V
CC
NC
HSB
W
A
13
A
8
A
9
NC
A
11
NC
NC
NC
V
SS
NC
NC
DQ
6
G
A
10
E
DQ
7
DQ
5
DQ
4
DQ
3
V
CC
V
CAP
A
14
A
12
A
7
A
6
A
5
A
4
A
3
NC
A
2
A
1
A
0
DQ
0
DQ
1
DQ
2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
HSB
W
A
13
A
8
A
9
A
11
G
NC
A
10
E
DQ
7
DQ
6
DQ
5
DQ
4
DQ
3
(TOP)
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
(TOP)
32 - Pin SOIC
48 - Pin SSOP
Relative PCB area usage.
See page 17 for detailed
package size specifications.
PIN DESCRIPTIONS
Pin Name
A
14
-A
0
DQ
7
-DQ
0
E
W
G
V
CC
HSB
Input
I/O
Input
Input
Input
Power Supply
I/O
I/O
Description
Address: The 15 address inputs select one of 32,768 bytes in the nvSRAM array
Data: Bi-directional 8-bit data bus for accessing the nvSRAM
Chip Enable: The active low E input selects the device
Write Enable: The active low W enables data on the DQ pins to be written to the address
location latched by the falling edge of E
Output Enable: The active low G input enables the data output buffers during read cycles.
De-asserting G high caused the DQ pins to tri-state.
Power: 3.3V, +10%, -20%
Hardware Store Busy: When low this output indicates a Store is in progress. When pulled
low external to the chip, it will initiate a nonvolatile STORE operation. A weak pull up resistor
keeps this pin high if not connected. (Connection Optional).
Autostore Capacitor: Supplies power to nvSRAM during power loss to store data from
SRAM to nonvolatile storage elements.
Ground
Unlabeled pins have no internal connections.
V
CAP
V
SS
(Blank)
Power Supply
Power Supply
No Connect
Document Control #ML0033 Rev 2.0
Jan 2008
2
SSOP
SIMTEK [ SIMTEK CORPORATION ]
