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STK16CA8-WF25I 参数 Datasheet PDF下载

STK16CA8-WF25I图片预览
型号: STK16CA8-WF25I
PDF下载: 下载PDF文件 查看货源
内容描述: 128K ×8 AutoStorePlus ™的nvSRAM QuantumTrap ™ CMOS非易失性静态RAM [128K x 8 AutoStorePlus™ nvSRAM QuantumTrap™ CMOS Nonvolatile Static RAM]
分类和应用: 静态存储器
文件页数/大小: 12 页 / 311 K
品牌: SIMTEK [ SIMTEK CORPORATION ]
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STK16CA8
valid. After the t
STORE
cycle time has been fulfilled,
the
SRAM
will again be activated for
READ
and
WRITE
operation.
sequence has been performed, regardless of device
power cycles.
The
AutoStore Inhibit
can be disabled by initiating
an
AutoStore Inhibit Off
sequence. A sequence of
read operations is performed in a manner similar to
the software RECALL initiation. To initiate the
AutoStore Inhibit Off
sequence, the following
sequence of E controlled read operations must be
performed:
1.
2.
3.
4.
5.
6.
Read address
Read address
Read address
Read address
Read address
Read address
4E38 (hex)
B1C7 (hex)
83E0 (hex)
7C1F (hex)
703F (hex)
4B46 (hex)
Valid READ
Valid READ
Valid READ
Valid READ
Valid READ
AutoStore Inhibit Off
SOFTWARE NONVOLATILE
RECALL
A software
RECALL
cycle is initiated with a sequence
of
READ
operations in a manner similar to the soft-
ware
STORE
initiation. To initiate the
RECALL
cycle,
the following sequence of
E
controlled
READ
opera-
tions must be performed:
1.
2.
3.
4.
5.
6.
Read address
Read address
Read address
Read address
Read address
Read address
4E38 (hex)
B1C7 (hex)
83E0 (hex)
7C1F (hex)
703F (hex)
4C63 (hex)
Valid READ
Valid READ
Valid READ
Valid READ
Valid READ
Initiate
RECALL
cycle
Internally,
RECALL
is a two-step procedure. First, the
SRAM
data is cleared, and second, the nonvolatile
information is transferred into the
SRAM
cells. After
the t
RECALL
cycle time the
SRAM
will once again be
ready for
READ
and
WRITE
operations. The
RECALL
operation in no way alters the data in the nonvolatile
elements. The nonvolatile data can be recalled an
unlimited number of times.
LOW AVERAGE ACTIVE POWER
The STK16CA8 draws significantly less current
when it is cycled at times longer than 50ns. Figure 3
shows the relationship between I
CC
and
READ
cycle
time. Worst-case current consumption is shown for
both
CMOS
and
TTL
input levels (commercial tem-
perature range, V
CC
= 3.6V, 100% duty cycle on chip
enable). Figure 4 shows the same relationship for
WRITE
cycles. If the chip enable duty cycle is less
than 100%, only standby current is drawn when the
chip is disabled. The overall average current drawn
by the STK16CA8 depends on the following items:
1)
CMOS
vs.
TTL
input levels; 2) the duty cycle of
chip enable; 3) the overall cycle rate for accesses;
4) the ratio of
READ
s to
WRITE
s; 5) the operating
temperature; 6) the V
cc
level; and 7) I/O loading.
HARDWARE PROTECT
The STK16CA8 offers hardware protection against
inadvertent
STORE
operation and
SRAM WRITE
s dur-
ing low-voltage conditions. When V
CCX
< V
SWITCH
, all
externally initiated
STORE
operations and
SRAM
WRITE
s will be inhibited.
PREVENTING STORES
The
AutoStore™
function can be disabled on the fly
by initiating an
AutoStore Inhibit
sequence. A
sequence of read operations is performed in a man-
ner similar to the software
STORE
initiation. To ini-
tiate the
AutoStore Inihibit
sequence, the following
sequence of E controlled read operations must be
performed:
1.
2.
3.
4.
5.
6.
Read address
Read address
Read address
Read address
Read address
Read address
4E38 (hex)
B1C7 (hex)
83E0 (hex)
7C1F (hex)
703F (hex)
8B45 (hex)
Valid READ
Valid READ
Valid READ
Valid READ
Valid READ
AutoStore Inhibit
Once the
AutoStore™
inhibit has been initiated, it
will remain active until an
AutoStore™
inhibit off
September 2003
9
Document Control # ML0023 rev 0.1