STK20C04
RECALL
CYCLES #1, #2 & #3
SYMBOLS
NO.
#1
33
34
35
36
37
38
39
40
t
NLQXp
t
NLNH
q
#2
t
ELQXR
t
ELNHR
t
NLEL
#3
t
GLQXR
t
GLNH
t
NLGL
RECALL
Cycle Time
RECALL
Initiation Cycle Time
NE Set-up
Output Enable Set-up
t
WHGL
t
ELGL
Write Enable Set-up
Chip Enable Set-up
NE Fall to Outputs Inactive
Power-up
RECALL
Duration
20
0
0
0
0
20
550
20
μs
ns
ns
ns
ns
ns
ns
μs
PARAMETER
MIN
MAX
UNITS
(V
CC
= 5.0V
±
10%)
t
GLNL
t
WHNL
t
ELNL
t
NLQZ
t
RESTORE
t
GLEL
t
WHEL
t
GLEL
Note p: Measured with W and NE both high, and G and E low.
Note q: Once t
NLNH
has been satisfied by NE, G, W and E, the
RECALL
cycle is completed automatically. Any of NE, G or E may be used to terminate
the
RECALL
initiation cycle.
Note r: If W is low at any point in which both E and NE are low and G is high, then a
STORE
cycle will be initiated instead of a
RECALL.
RECALL
CYCLE #1:
NE Controlled
NE
34
t
NLNH
36
t
GLNL
G
W
37
t
WHNL
38
t
ELNL
33
t
NLQX
HIGH IMPEDANCE
E
39
t
NLQZ
DQ (DATA OUT)
RECALL
CYCLE #2:
E Controlled
NE
35
t
NLEL
36
t
GLEL
G
W
E
37
t
WHEL
34
t
ELNHR
33
t
ELQXR
DQ (DATA OUT)
HIGH IMPEDANCE
RECALL
CYCLE #3:
G Controlled
NE
G
35
t
NLGL
34
t
GLNH
37
t
WHGL
38
t
ELGL
W
E
DQ (DATA OUT)
HIGH IMPEDANCE
33
t
GLQXR
March 2006
7
Document Control # ML0001 rev 0.2
SIMTEK [ SIMTEK CORPORATION ]
