U63716
PowerStore and automatic Power Up RECALL
VCC
5.0 V
VSWITCH
t
PowerStore
(25)
tPDSTORE
Power Up
(24)
(24)
RECALL
tRESTORE
tRESTORE
W
tDELAY
DQi
POWER UP BROWN OUT
BROWN OUT
NO STORE
PowerStore
RECALL
(NO SRAM WRITES)
Symbol
Software Controlled STORE/
No.
Min.
Max.
Unit
RECALL Cyclek, o
Alt.
IEC
27 STORE/RECALL Initiation Time
28 Chip Enable to Output Inactivep
29 STORE Cycle Timeq
tAVAV
tELQZ
tcR
70
ns
ns
ms
μs
ns
ns
ns
tdis(E)SR
td(E)S
600
10
tELQXS
tELQXR
tAVELN
tELEHN
tEHAXN
30 RECALL Cycle Timer
td(E)R
20
31 Address Setup to Chip Enables
32 Chip Enable Pulse Widths, t
33 Chip Disable to Address Changes
tsu(A)SR
tw(E)SR
th(A)SR
0
60
0
o: The software sequence is clocked with E controlled READs.
p: Once the software controlled STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs.
q: Note that STORE cycles (but not RECALL) are inhibited by VCC < VSWITCH (STORE inhibit).
r: An automatic RECALL also takes place at power up, starting when VCC exceeds VSWITCH and takes tRESTORE. VCC must not drop below
VSWITCH once it has been exceeded for the RECALL to function properly.
s: Noise on the E pin may trigger multiple READ cycles from the same address and abort the address sequence.
t: If the Chip Enable Pulse Width is less than ta(E) (see Read Cycle) but greater than or equal tw(E)SR, than the data may not be valid at
the end of the low pulse, however the STORE or RECALL will still be initiated.
Rev 1.0
March 31, 2006
STK Control #ML0053
8
SIMTEK [ SIMTEK CORPORATION ]
