V
= +5V
CC
C
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
SS
+
–
+
–
C
C
2
1
–
C
–10V
3
Figure 2. Charge Pump — Phase 2
Phase 4
Transmitter/Driver
— V transfer — The fourth phase of the clock
connDeDcts the negative terminal of C2 to ground,
and transfers the generated l0V across C2 to C ,
theV storagecapacitor.Again,simultaneousl4y
with DthDis, the positive side of capacitor C1 is
switched to +5V and the negative side is
connectedtoground, andthecyclebeginsagain.
The drivers are inverting transmitters, which
accept either TTL or CMOS inputs and output the
RS-232 signals with an inverted sense relative to
the input logic levels. Typically, the RS-232
outputvoltageswingis+9Vwithnoload,and+5V
minimum with full load. The transmitter outputs
are protected against infinite short–circuits to
ground without degradation in reliability. The
drivers of the SP211E, and SP213E can be
tri–stated by using the SHUTDOWN function.
Since both V+ and V– are separately generated
from VCC; in a no–load condition V+ and V– will
be symmetrical. Older charge pump approaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefficiencies in the design.
Inthe“power-off”state,theoutputimpedancewill
remaingreaterthan300ohms, againsatisfyingthe
RS-232 specifications. Should the input of the
driver be left open, an internal 400Kohm pullup
resistor to V forces the input high, thus committing
the output CtoC a low state. The slew rate of the
transmitter output is internally limited to a
maximum of 30V/µs in order to meet the EIA
standards (EIA RS-232D 2.1.7, Paragraph 5). The
transition of the loaded output from high to low
also meets the monotonicity requirements of the
standard.
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors can
be as low as 0.1µF with a 16V breakdown
voltage rating.
+10V
a) C2+
GND
GND
b) C2–
–10V
Figure 3. Charge Pump Waveforms
SP207EDS/09
SP207E Series High Performance RS232 Transceivers
© Copyright 2000 Sipex Corporation
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