Phase 4
— V
DD
transfer — The fourth phase of the clock
connects the negative terminal of C
2
to GND,
and transfers this positive generated voltage
across C
2
to C
4
, the V
DD
storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous
with the transfer of the voltage to C
4
, the positive
side of capacitor C
1
is switched to V
CC
and the
negative side is connected to GND, allowing the
charge pump cycle to begin again. The charge
pump cycle will continue as long as the opera-
tional conditions for the internal oscillator are
present.
Since both V
+
and V
–
are separately generated
from V
CC
; in a no–load condition V
+
and V
–
will
be symmetrical. Older charge pump approaches
that generate V
–
from V
+
will show a decrease in
the magnitude of V
–
compared to V
+
due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 250kHz. The external capacitors can
be as low as 0.1µF with a 16V breakdown
voltage rating.
ESD Tolerance
The
SP3222E/3232E
series incorporates
ruggedized ESD cells on all driver output and
receiver input pins. The ESD structure is
improved over our previous family for more
rugged applications and environments sensitive
to electro-static discharges and associated
transients. The improved ESD tolerance is at
least
±15kV
without damage nor latch-up.
There are different methods of ESD testing
applied:
a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semiconduc-
tors. This method is also specified in MIL-STD-
883, Method 3015.7 for ESD testing. The premise
of this ESD test is to simulate the human body’s
Date: 02/24/05
potential to store electro-static energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
shown in
Figure 17.
This method will test the
IC’s capability to withstand an ESD transient
during normal handling such as in manufacturing
areas where the ICs tend to be handled
frequently.
The IEC-1000-4-2, formerly IEC801-2, is
generally used for testing ESD on equipment
and systems. For system manufacturers, they
must guarantee a certain amount of ESD
protection since the system itself is exposed to
the outside environment and human presence.
The premise with IEC1000-4-2 is that the
system is required to withstand an amount of
static electricity when ESD is applied to points
and surfaces of the equipment that are
accessible to personnel during normal usage.
The transceiver IC receives most of the ESD
current when the ESD source is applied to the
connector pins. The test circuit for IEC1000-4-2
is shown on
Figure 18.
There are two methods
within IEC1000-4-2, the Air Discharge method
and the Contact Discharge method.
With the Air Discharge Method, an ESD
voltage is applied to the equipment under
test (EUT) through air. This simulates an
electrically charged person ready to connect a
cable onto the rear of the system only to find
an unpleasant zap just before the person
touches the back panel. The high energy
potential on the person discharges through
an arcing path to the rear panel of the system
before he or she even touches the system. This
energy, whether discharged directly or through
air, is predominantly a function of the discharge
current rather than the discharge voltage.
Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with
the approach speed.
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
11
SIPEX [ SIPEX CORPORATION ]
