Output
Under
Test
500Ω
C
L
S
1
V
CC
Receiver
Output
C
RL
Test Point
S
1
1KΩ
S
2
1KΩ
V
CC
S
2
Figure 16. Driver Timing Test Load #2 Circuit
V
CC
A
R
OUT
B
C
L2
Figure 17. Receiver Timing Test Load Circuit
C
L1
T
IN
A
B
15pF
Figure 18. Driver/Receiver Timing Test Circuit
SWITCHING WAVEFORMS...
+3V
DRIVER INPUT
0V
DRIVER
OUTPUT
A
B
t
DPHL
t
DPLH
V
O
1/2V
O
f = 1MHz; t
R
≤
10ns; t
F
≤
10ns
1.5V
t
PLH
t
PHL
1/2V
O
1.5V
DIFFERENTIAL V
O
+
OUTPUT 0V
V
A
– V
B
V
O
–
t
SKEW
= |t
DPLH
- t
DPHL
|
Figure 19. Driver Propagation Delays
t
F
t
R
+3V
ENABLE
0V
A, B
5V
V
OL
V
OH
A, B
0V
f = 1MHz; t
R
< 10ns; t
F
< 10ns
1.5V
t
ZL
2.3V
Output normally LOW
1.5V
t
LZ
0.5V
0.5V
t
HZ
2.3V
t
ZH
Output normally HIGH
Figure 20. Driver Enable and Disable Times
SP322DS/06
Date: 10/1/05
SP322 V.11/V.35 Serial Transceiver
SP322 V.11/V.35 Serial Transceiver
© Copyright 1997 Sipex Corporation
© Copyright 2005 Sipex Corporation
7
SIPEX [ SIPEX CORPORATION ]
