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SGA-8343Z 参数 Datasheet PDF下载

SGA-8343Z图片预览
型号: SGA-8343Z
PDF下载: 下载PDF文件 查看货源
内容描述: 低噪声,高增益的SiGe HBT [Low Noise, High Gain SiGe HBT]
分类和应用:
文件页数/大小: 4 页 / 96 K
品牌: SIRENZA [ SIRENZA MICRODEVICES ]
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Product Description
Sirenza Microdevices’ SGA-8343 is a high performance
Silicon
Germanium Heterostructure Bipolar Transistor (SiGe HBT)
designed for operation from DC to 6 GHz. The SGA-8343 is
optimized for 3V operation but can be biased at 2V for low-voltage
battery operated systems. The device provides high gain, low NF,
and excellent linearity at a low cost. It can be operated at very low
bias currents in applications where high linearity is not required.
The matte tin finish on Sirenza’s lead-free package utilizes a post
annealing process to mitigate tin whisker formation and is RoHS
compliant per EU Directive 2002/95. This package is also
manufactured with green molding compounds that contain no
antimony trioxide nor halogenated fire retardants.
Typical Performance - 3V, 10mA
40
35
30
25
20
15
10
5
0
0
1
2
2 .4
2 .1
1 .8
1 .5
1 .2
Gmax
Gain
SGA-8343
SGA-8343Z
Pb
RoHS Compliant
&
Green
Package
Low Noise, High Gain SiGe HBT
Preliminary
Product Features
• Now Available in Lead Free, RoHS
Compliant, & Green Packaging
• DC-6 GHz Operation
• 0.9 dB NF
MIN
@ 0.9 GHz
• 24 dB Gmax @ 0.9 GHz
• |G
OPT
|=0.10 @ 0.9 GHz
• OIP3 = +28 dBm, P1dB = +9 dBm
• Low Cost, High Performance, Versatility
Gain, Gmax (dB)
NF
MIN
Applications
Analog and Digital Wireless Systems
3G, Cellular, PCS, RFID
Fixed Wireless, Pager Systems
Driver Stage for Low Power Applica-
tions
• Oscillators
NF
MIN
(dB)
0 .9
0 .6
0 .3
0
6
7
8
3
4
5
Frequency (GHz)
Symbol
D evice C haracteristics
Test C onditions
V
CE
=3V, I
CQ
=10mA, 25°C
(unless otherw ise noted)
Test Frequency
U nits
Min.
Typ.
Max.
G
MAX
Maxi mum Avai lable Gai n
Z
S
=Z
S
*, Z
L
=Z
L
*
0.9 GHz
1.9 GHz
2.4 GHz
0.9 GHz
1.9 GHz
2.4 GHz
0.9 GHz
1.9 GHz
1.9 GHz
1.9 GHz
1.9 GHz
dB
23.9
19.3
17.7
0.94
1.10
1.18
21.0
22.0
1.40
15.5
25.8
7.5
120
16.5
27.8
9.0
180
6.0
200
4.0
50
300
23.0
1.75
17.5
NF
S
21
NF
Gai n
OIP
3
P
1dB
h
FE
B V
C EO
Rth
V
CE
I
CE
Mi ni mum Noi se Fi gure
Inserti on Gai n
[1]
Noi se Fi gure
[2]
Gai n
[2]
Output Thi rd Order Intercept Poi nt
[2]
Output 1dB C ompressi on Poi nt
[2]
D C C urrent Gai n
C ollector-Emi tter Breakdown Voltage
Thermal Resi stance
Operati ng Voltage
Operati ng C urrent
Z
S
=Gamma
OPT
, Z
L
=Z
L
*
Z
S
=Z
L
= 50 Ohms
LNA Appli cati on
C i rcui t Board
LNA Appli cati on
C i rcui t Board
LNA Appli cati on
C i rcui t Board
LNA Appli cati on
C i rcui t Board
dB
dB
dB
dB
dB m
dB m
V
juncti on-to-lead
collector-emi tter
collector-emi tter
o
5.7
C /W
V
mA
[1] 100% tested - Insertion gain tested using a 50 ohm contact board (no matching circuitry) during final production test.
[2] Sample tested - Samples pulled from each wafer/package lot. Sample test specifications are based on statistical data from sample test measurements. The test fixture is
an engineering application circuit board (parts are pressed down on the circuit board). The application circuit represents a trade-off between the optimal noise match and
input return loss.
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this
information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or
granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems.
Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 Technology Court, Broomfield, CO 80021
Phone: (800) SMI-MMIC
http://www.sirenza.com
1
EDS-101845 Rev F