Preliminary
Product Description
Sirenza Microdevices’ SPF-3043 is a high performance
0.25µm pHEMT Gallium Arsenide FET. This 300µm device is
ideally biased at 3V,20mA for lowest noise performance and
battery powered requirements. At 5V,40mA the device can
deliver OIP3 of 32dBm. It provides ideal performance as a
driver stage in many commercial and industrial LNA
applications.
Typical Gain Performance
35
30
25
20
15
3V,20mA
5V,40mA
SPF-3043
Low Noise pHEMT GaAs FET
Pending Obsolescence
Last Time Buy Date: Dec. 19, 2003
Product Features
•
•
•
•
•
•
•
DC-10 GHz Operation
0.5 dB NF
MIN
@ 2 GHz
22 dB G
MAX
@ 2 GHz
+32 dBm OIP3 (5V,40mA)
+20 dBm P1dB (5V,40mA)
Low Current, Low Cost
Apps circuits available for key bands
Gain, Gmax (dB)
Gmax
Gain
10
5
0
2
4
6
8
10
Applications
•
•
•
•
Analog and Digital Wireless Systems
3G, Cellular, PCS
Fixed Wireless, Pager Systems
Driver Stage for Low Power Applications
Test
Frequency
0.9 GHz
1.9 GHz
0.9 GHz
1.9 GHz
0.9 GHz
1.9 GHz
1.9 GHz
1.9 GHz
1.9 GHz
U nits
Min.
Typ.
26.5
23.4
0.32
0.54
18.5
20.0
1.05
14.0
26.0
15.0
-1.1
30
90
15.3
28.5
17.0
-0.8
60
150
-10
-10
150
5.5
55
-8
-8
-0.5
120
21.5
1.40
Max.
Frequency (GHz)
Symbol
D evice C haracteristics
Test C onditions
V
DS
=5V, I
DQ
=40mA, 25ºC
(unless otherw ise noted)
G
MAX
NF
MIN
S
21
NF
Gai n
OIP
3
P
1dB
V
P
I
DSS
g
m
BV
GSO
BV
GDO
Rth
V
DS
I
DS
Maxi mum Avai lable Gai n
Mi ni mum Noi se Fi gure
Inserti on Gai n
[1]
Noi se Fi gure
Gai n
[2]
Output Thi rd Order Intercept Poi nt
[2]
Output 1dB C ompressi on Poi nt
[2]
Pi nchoff Voltage
[1]
[2]
Z
S
=Z
S
*, Z
L
=Z
L
*
Z
S
=Γ
OPT
, Z
L
=Z
L
*
Z
S
=Z
L
= 50
Ω
LNA Appli cati on C i rcui t Board
LNA Appli cati on C i rcui t Board
LNA Appli cati on C i rcui t Board
LNA Appli cati on C i rcui t Board
V
DS
= 2V, I
DS
= 0.1 mA
V
DS
= 2V, V
GS
= 0 V
V
DS
= 2V, V
GS
= 0 V
[1]
dB
dB
dB
dB
dB
dB m
dB m
V
mA
mS
V
V
ºC /W
V
mA
Saturated D rai n C urrent
[1]
Transconductance
[1]
Gate-Source Breakdown Voltage
Gate-D rai n Breakdown Voltage
Thermal Resi stance
Operati ng Voltage
Operati ng C urrent
[1]
I
GS
= 0.03 mA, drai n open
I
GD
= 0.03 mA, source open
juncti on-to-lead
drai n-source
drai n-source
[1] 100% tested - DC parameters tested on-wafer, insertion gain tested using a 50 ohm contact board (no matching circuitry) during final production test.
[2] Sample tested - Samples pulled from each wafer/package lot. Sample test specifications are based on statistical data from 500 devices across 5 wafers, 3 wafer lots. The
test fixture is an engineering application circuit board (parts are pressed down on the circuit board). The application circuit represents a trade-off between the optimal noise
match and input return loss.
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions.
Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are
subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not
authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems.
Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
http://www.sirenza.com
EDS-101772 Rev D
1
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