欢迎访问ic37.com |
会员登录 免费注册
发布采购

SPF-3143Z 参数 Datasheet PDF下载

SPF-3143Z图片预览
型号: SPF-3143Z
PDF下载: 下载PDF文件 查看货源
内容描述: 低噪声pHEMT制的GaAs FET [Low Noise pHEMT GaAs FET]
分类和应用:
文件页数/大小: 3 页 / 116 K
品牌: SIRENZA [ SIRENZA MICRODEVICES ]
 浏览型号SPF-3143Z的Datasheet PDF文件第2页浏览型号SPF-3143Z的Datasheet PDF文件第3页  
SPF-3143Z
Product Description
Sirenza Microdevices’ SPF-3143Z is a high performance 0.5μm pHEMT
Gallium Arsenide FET. This 600μm device is ideally biased at 3V, 20mA
for lowest noise performance and battery powered requirements. At
5V, 40mA the device can deliver OIP3 of 32.5 dBm. It provides ideal
performance as a driver stage in many commercial and industrial LNA
applications.
The matte tin finish on Sirenza’s lead-free package utilizes a post annealing
process to mitigate tin whisker formation and is RoHS compliant per EU
Directive 2002/95. This package is also manufactured with green molding
compounds that contain no antimony trioxide nor halogenated fire retardants.
Typical Gain Performance
Pb
RoHS Compliant
&
Green
Package
Low Noise pHEMT GaAs FET
Product Features
• Available in Lead free, RoHS compliant, & Green
packaging
• DC-3.5 GHz Operation
• 0.58 dB NF
MIN
@ 2 GHz
• 21 dB G
MAX
@ 2 GHz
• +31 dBm OIP3 (5V,40mA)
• +17.7 dBm P1dB (5V,40mA)
• Low Current, Low Cost
• Apps circuits available for key bands
40
35
30
25
20
15
10
5
0
0
5V 40mA
Gain, Gmax (dB)
3V 20mA
Gmax
Gain
Applications
Analog and Digital Wireless Systems
3G, Cellular, PCS
Fixed Wireless, Pager Systems
Driver Stage for Low Power Applications
2
4
Frequency (GHz)
6
8
10
Test Conditions
Symbol
Parameters
V
DS
=5V, I
DQ
=40mA, 25C
(unless otherwise noted)
Units
Test Frequency
(GHz)
Min.
Typ.
Max.
G
MAX
NF
MIN
S
21
NF
Gain
OIP
3
P
1dB
V
P
I
DSS
g
m
BVGSO
BVGDO
V
DS
I
DS
R
TH
, j-l
Maximum Available Gain
Minimum Noise Figure
Insertion Gain
Noise Figure
Gain
Output Third Order Intercept Point
Output Power at 1dB Compression
Pinchoff Voltage
Saturated Drain Current
Transconductance
Gate-Source Breakdown Voltage
Gate-Drain Breakdown Voltage
Device Operating Voltage
Device Operating Current
Thermal Resistance (junction - lead)
Z
S
=Z
S
*, Z
L
=Z
L
*
Z
S
OPT
, Z
L
=Z
L
*
Z
S
=Z
L
=50Ω
Application Circuit
Application Circuit
Application Circuit,
Tone Spacing = 1MHz,
Pout per tone = 0 dBm
Application Circuit
V
DS
= 2V, I
DS
= 0.6mA
V
DS
= 2V, V
GS
= 0 V
V
DS
= 2V, V
GS
= 0 V
I
GS
= 300
μA,
drain open
I
GD
= 300
μA,
source open
drain-source
drain-source
junction to lead
dB
dB
dB
dB
dB
dBm
0.9
1.9
0.9
1.9
0.9
1.9
1.9
1.9
1.9
18.2
14.1
30.5
19.0
-1.4
23.3
19.9
0.36
0.58
19.7
0.8
15.6
32.5
20.5
-1.0
180
210
-10
-12
21.2
1.0
17.1
V
mA
mS
V
V
V
mA
°C/W
-0.6
-7
-7
5.5
38
40
200
42
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this
information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or
granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems.
Copyright 2006 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 Technology Court, Broomfield, CO 80021
Phone: (800) SMI-MMIC
http://www.sirenza.com
EDS-103162 Rev C
1