SZA-2044 2.0-2.7GHz 5V Power Amp
Pin Out Description
Pin #
1,2,4,5,
7,9,11,
13,
15,17,19
Function
Description
These are unused pins and not wired inside the package. They may be grounded or connected to adjacent
pins.
VPC1 is the bias control pin for the stage 1 active bias circuit. An external series resistor is required for proper
setting of bias levels. Refer to the evaluation board schematic for resistor value. To prevent potential damage,
do not apply voltage to this pin that is +1V greater than voltage applied to pin 20 (Vbias) unless Vpc supply
current capability is less than 10 mA.
VPC2 is the bias control pin for the stage 2 active bias circuit. An external series resistor is required for proper
setting of bias levels. Refer to the evaluation board schematic for resistor value. To prevent potential damage,
do not apply voltage to this pin that is +1V greater than voltage applied to pin 20 (Vbias) unless Vpc supply
current capability is less than 10 mA.
Output power detector voltage. Load with > 10K ohms for best performance
RF input pin. This is DC grounded internal to the IC. Do not apply voltage to this pin.
RF output pin. This is also another connection to the 2nd stage collector.
2nd stage collector bias pin. Apply 3.0 to 5.0V to this pin.
1st stage collector bias pin. Apply 3.0 to 5.0V to this pin.
Active bias network VCC. Apply 3.0 to 5.0V to this pin.
Exposed area on the bottom side of the package needs to be soldered to the ground plane of the board for
optimum thermal and RF performance. Several vias should be located under the EPAD as shown in the rec-
ommended land pattern (page 5).
N/C
6
VPC1
8
VPC2
10
3
12,14
16
18
20
EPAD
Vdet
RFIN
RFOUT
VC2
VC1
Vbias
Gnd
Simplified Device Schematic
Absolute Maximum Ratings
Pin
20
Pin
6
Pin
18
Pin
8
Pin
16
Parameters
VC2 Collector Bias Current (I
VC2
)
VC1 Collector Bias Current (I
VC1
)
Device Voltage (V
D
)
Power Dissipation
Value
500
150
7.0
3
-40 to +85
15
8
-40 to +150
+150
500
Unit
mA
mA
V
W
ºC
dBm
dBm
ºC
ºC
V
Stage 1
Bias
Stage 2
Bias
Operating Lead Temperature (T
L
)
Max RF Input Power for 50 ohm output
load
Max RF Input Power for 10:1 VSWR RF
out load
Storage Temperature Range
Pin 3
EPAD
Pin
10
EPAD
Pin 12, 14
Operating Junction Temperature (T
J
)
ESD Human Body Model (Class 1C)
Operation of this device beyond any one of these limits may
cause permanent damage. For reliable continuous operation
the device voltage and current must not exceed the maximum
operating values specified in the table on page one.
Bias conditions should also satisfy the following expression:
I
D
V
D
< ( T
J
- T
L
) / R
TH’
j-l
Caution: ESD Sensitive
Appropriate precaution in handling, packaging
and testing devices must be observed.
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC
2
http://www.sirenza.com
EDS-103612 Rev E
SIRENZA [ SIRENZA MICRODEVICES ]
