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XD010-24S-D2F 参数 Datasheet PDF下载

XD010-24S-D2F图片预览
型号: XD010-24S-D2F
PDF下载: 下载PDF文件 查看货源
内容描述: 一九三零年至1990年兆赫级A / AB 12W CDMA驱动放大器 [1930-1990 MHz Class A/AB 12W CDMA Driver Amplifier]
分类和应用: 放大器驱动
文件页数/大小: 5 页 / 220 K
品牌: SIRENZA [ SIRENZA MICRODEVICES ]
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XD010-24S-D2F
Product Description
Sirenza Microdevices’
XD010-24S-D2F
12W power module is a robust 2-
stage Class A/AB amplifier module for use in the driver stages of CDMA
RF power amplifiers. The power transistors are fabricated using Sirenza’s
latest, high performance LDMOS process. This unit operates from a single
voltage and has internal temperature compensation of the bias voltage to
ensure consistant performance over the full temperature range. It is inter-
nally matched to 50 ohms.
1930-1990 MHz Class A/AB
12W CDMA Driver Amplifier
Functional Block Diagram
Stage 1
Stage 2
Product Features
Temperature
Compensation
Temperature
Compensation
4
5
50
W
RF impedance
12W Output P
1dB
Single Supply Operation : Nominally 28V
High Gain: 28 dB at 1960 MHz
High Efficiency: 26% at 1960 MHz
Advanced, XeMOS LDMOS II FETS
Temperature Compensation
1
2
3
RF in
V
D1
V
D2
Case Flange = Ground
RF out
Applications
Base Station PA driver
Repeater
CDMA
GSM / EDGE
Key Specifications
Symbol
Frequency
P
1dB
Gain
Gain Flatness
IRL
Efficiency
Parameter
Frequency of Operation
Output Power at 1dB Compression
Gain at 1W Output Power
Peak to Peak Gain Variation, 1930-1990MHz
Input Return Loss 1W Output Power, 1930-1990MHz
Drain Efficiency at 10W CW output
Drain Efficiency at 2W CDMA (Single Carrier IS-95, 9 Ch Fwd)
Drain Efficiency at 1W CDMA (Single Carrier IS-95, 9 Ch Fwd)
ACPR at 1W CDMA Power Output (Single Carrier IS-95, 9 Ch
Fwd, Offset=750KHz, ACPR Integrated Bandwidth)
Linearity
ALT-1 at 2W CDMA (Single Carrier IS-95, 9 Ch Fwd,
Offset=1980 KHz, ACPR Integrated Bandwidth)
3
rd
Order IMD at 10W PEP (Two Tone; 1MHz)
Delay
Phase Linearity
R
TH, j-l
R
TH, j-2
Signal Delay from Pin 1 to Pin 5
Deviation from Linear Phase (Peak to Peak)
Thermal Resistance Stage 1 (Junction to Case)
Thermal Resistance Stage 2 (Junction to Case)
Unit
MHz
W
dB
dB
dB
%
%
%
dB
dB
dBc
nS
Deg
ºC/W
ºC/W
-27
10
20
Min.
1930
10
26
12
28
0.4
14
26
12
6.5
-58
-70
-32
2.9
0.5
11
4
1.0
Typ.
Max.
1990
Test Conditions: Z
in
= Z
out
= 50Ω, V
DD
= 28.0V, I
DQ1
= 230mA, I
DQ2
= 150mA, T
Flange
= 25ºC
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such
information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any thrid party. Sirenza Microdevices
does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 S. Technology Court,
Broomfield, CO 80021
Phone: (800) SMI-MMIC
1
http://www.sirenza.com
EDS-102932 Rev C