Product Description
Sirenza Microdevices’
XD010-42S-D4F
8W power module is a robust 2-
stage Class A amplifier module for use in the driver stages of linear RF
power amplifiers of cellular base stations. The power transistors are fabri-
cated using Sirenza's latest, high performance LDMOS process. This unit
operates from a single voltage and has internal temperature compensation
of the bias voltage to ensure stable performance over the full temperature
range. It is internally matched to 50 ohms.
XD010-42S-D4F
XD010-42S-D4FY
Pb
RoHS Compliant
&
Green
Package
869-894 MHz Class A
8 W Power Amplifier Module
Functional Block Diagram
Stage 1
Stage 2
Product Features
•
Available in RoHS compliant packaging
• 50
W
RF impedance
• 8W Output P1dB Typical
• Single Supply Operation : Nominally 28V
• High Gain: 30 dB at 880 MHz
• Advanced, XeMOS II LDMOS FETS
• Temperature Compensation
4
Bias
Network
Temperature
Compensation
1
2
3
Applications
• Base Station PA driver
• Repeater
RF in
V
D1
V
D2
Case Flange = Ground
RF out
• CDMA
• GSM / EDGE
Key Specifications
Symbol
Frequency
P
1dB
Gain
Gain Flatness
IRL
Efficiency
Parameter
Frequency of Operation
Output Power at 1dB Compression, 880 MHz
Gain at 1W Output Power (CW)
Over Frequency at 1W Output (CW)
Input Return Loss at 1W Output (CW) (50Ω Ref)
Drain Efficiency at 8W CW Output
Drain Efficiency at 1W CDMA (Single Carrier IS-95)
ACPR at 1W CDMA Output (Single Carrier IS-95, 9 Ch Fwd,
Offset=750KHz, ACPR Integrated Bandwidth)
Linearity
ALT-1 at 1W CDMA (Single Carrier IS-95, 9 Ch Fwd,
Offset=1980KHz, ACPR Integrated Bandwidth)
3rd Order IMD at 8W PEP (Two Tone 1MHz Spacing)
3rd Order IMD at 1W PEP (Two Tone 1MHz Spacing)
Delay
Phase Linearity
R
TH, j-l
Signal Delay from Pin 1 to Pin 4
Deviation from Linear Phase (Peak to Peak)
Thermal Resistance Stage 1 (Junction to Case)
Unit
MHz
W
dB
dB
dB
%
%
dB
dB
dB
dBc
nS
Deg
ºC/W
-28
-40
14
22
Min.
869
7
28
8
30
0.4
20
24
3.5
-50
-75
-32
-50
3.9
0.5
11
4
1
Typ.
Max.
894
(Junction
ºC/W
R
Conditions: Z = Z
Thermal Resistance Stage 2
= 230mA,
to
I
Case)
700mA, T
Test
TH, j-2
in
out
= 50Ω, V
DD
= 28.0V, I
DQ1
DQ2
=
Flange
= 25ºC
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such
information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any thrid party. Sirenza Microdevices
does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 S. Technology Court,
Broomfield, CO 80021
Phone: (800) SMI-MMIC
1
http://www.sirenza.com
EDS-102938 Rev E
SIRENZA [ SIRENZA MICRODEVICES ]
