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74LS164 PDF Datasheet浏览和下载

型号.:
74LS164
PDF下载:
下载PDF文件
内容描述:
8位串行输入/并行输出移位寄存器
[8-Bit Serial-Input/Parallel-Output Shift Register]
文件大小:
40 K
文件页数:
4 Pages
品牌Logo:
品牌名称:
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
PCB Prototype
  • 供货商
  • IC型号
  • 厂家
  • 批号
  • 数量
  • 封装
  • 单价/备注
  • 操作
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SL74LS164
8-Bit Serial-Input/Parallel-Output
Shift Register
This 8-bit shift register features gated serial inputs and an
asynchronous reset. The gated serial inputs (A and B) permit complete
control over incoming data as a low at either (or both) input(s) inhibits
entry of the new data and resets the first flip flop to the low level at the
next clock pulse. A high level input enables the other input which will
then determine the state of the first flip-flop. Data at the serial inputs
may be changed while the clock is high or low, but only information
meeting the setup requirements will be entered clocking occurs or the
low-to-high level transition of the clock input. All inputs are diode-
clamped to minimize transmission-line effects.
Gated (Enable/Disable) Serial Inputs
Fully Buffered Clock and Serial Inputs
Asynchronous Clear
ORDERING INFORMATION
SL74LS164N Plastic
SL74LS164D SOIC
T
A
=0° to 70°C
for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Reset
L
H
H
PIN 14 =V
CC
PIN 7 = GND
H
H
Clock
X
A1 A2
X X
X X
H D
D H
L L
Outputs
Q
A
Q
B
... Q
H
L
L ... L
no change
D Q
An
... Q
Gn
D Q
An
... Q
Gn
L Q
An
... Q
Gn
D = data input
X = don’t care
Q
An
- Q
Gn
= data shifted from the previous stage on a
rising edge at the clock input.
SLS
System Logic
Semiconductor