SL4011B
Quad 2-Input NAND Gate
High-Voltage Silicon-Gate CMOS
The SL4011B NAND gates provide the system designer with direct
emplementation of the NAND function.
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1
µA
at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
SL4011BN Plastic
SL4011BD SOIC
T
A
= -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
A
L
PIN 14 =V
CC
PIN 7 = GND
L
H
H
B
L
H
L
H
Output
Y
H
H
H
L
SLS
System Logic
Semiconductor
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
