SL4015B
AC ELECTRICAL CHARACTERISTICS(CL=50pF, RL=200kW, Input tr=tf=20 ns)
VCC
V
Guaranteed Limit
Symbol
tmax
Parameter
³ -55°C
25°C
£125°C
Unit
Maximum Clock Frequency (Figure 1)
5.0
10
15
3
6
8.5
3
6
8.5
1.5
3
4.25
MHz
tPHL, tPLH Maximum Propagation Delay, Clock to Q (Figure
1)
5.0
10
15
320
160
120
320
160
120
640
320
240
ns
ns
ns
pF
tPHL
Maximum Propagation Delay, Reset to Q (Figure
2)
5.0
10
15
400
200
160
400
200
160
800
400
320
tTHL, tTLH Maximum Output Transition Time, Any Output
(Figure 1)
5.0
10
15
200
100
80
200
100
80
400
200
160
CIN
Maximum Input Capacitance
-
7.5
TIMING REQUIREMENTS(CL=50pF, RL=200 kW, Input tr=tf=20 ns)
VCC
Guaranteed Limit
Symbol
tw
Parameter
V
³ -55°C
25°C
£125°C
Unit
ns
Minimum Pulse Width, Clock (Figure 1)
5.0
10
15
180
80
50
180
80
50
360
160
100
tw
Minimum Pulse Width, Reset (Figure 2)
5.0
10
15
200
80
60
200
80
60
400
160
120
ns
ns
ns
ms
tsu
Minimum Setup Time, Data to Clock
(Figure 3)
5.0
10
15
70
40
30
70
40
30
140
80
60
th
Minimum Hold Time, Clock to Data
(Figure 3)
5.0
10
15
0
0
0
0
0
0
0
0
0
tr, tf
Maximum Input Rise and Fall Time (Figure 1)
5.0
10
15
15
6
2
15
6
2
30
12
4
System Logic
Semiconductor
SLS
.
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
