SL4060B
14-Stage Ripple-Carry Binary
Counter/Divider and Oscillator
High-Voltage Silicon-Gate CMOS
The SL4060B consists of an oscillator section and 14 ripple-carry
binary counter stages. The oscillator configuration allows design of
either RC or crystal oscillator circuits. A RESET input is provided
which resets the counter to the all-Q’s state and disables the oscillator.
A high level on the RESET line accomplishes the reset function. All
counter stages are master-slave flip-flops. The state of the counter is
advanced one step in binary order on the negative transition of OSC In
(and OSC Out). Schmitt trigger action on the input-pulse line permits
unlimited input-pulse rise and fall times.
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1
µA
at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
SL4060BN Plastic
SL4060BD SOIC
T
A
= -55° to 125° C for all
packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Osc In
Reset
L
L
PIN 16=V
CC
PIN 8= GND
X
H
Outputs
Q
No change
Advance to
next state
All Outputs
are low
X = don’t care
SLS
System Logic
Semiconductor
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
