SL74HC251
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
Symbol
t
PLH
, t
PHL
Parameter
Maximum Propagation Delay, Input D to
Output Y or Y (Figures 1,2 and 5)
Maximum Propagation Delay , Input A to
Output Y or Y (Figures 3 and 5)
Maximum Propagation Delay , Output Enable to
Output Y (Figures 4 and 6)
Maximum Propagation Delay , Output Enable to
Output Y (Figures 4 and 6)
Maximum Propagation Delay , Output Enable to
Output Y (Figures 4 and 6)
Maximum Propagation Delay , Output Enable to
Output Y (Figures 4 and 6)
Maximum Output Transition Time, Any Output
(Figures 1 and 6)
Maximum Input Capacitance
Maximum Three-State Output Capacitance
(Output in High-Impedance State)
Power Dissipation Capacitance (Per Package)
C
PD
Used to determine the no-load dynamic power
consumption: P
D
=C
PD
V
CC2
f+I
CC
V
CC
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
-
-
Guaranteed Limit
25
°C
to
-55°C
185
37
31
205
41
35
195
39
33
145
29
25
220
44
37
150
30
26
75
15
13
10
15
≤85°C
230
46
39
255
51
43
245
48
42
180
36
31
275
55
47
190
38
33
95
19
16
10
15
≤125°C
280
56
48
310
62
53
295
59
50
220
44
38
330
66
56
225
45
38
110
22
19
10
15
Unit
ns
t
PLH
, t
PHL
ns
t
PLZ
, t
PHZ
ns
t
PZL
, t
PZH
ns
t
PLZ
, t
PHZ
ns
t
PZL
, t
PZH
ns
t
TLH
, t
THL
ns
C
IN
C
OUT
pF
pF
Typical @25°C,V
CC
=5.0 V
36
pF
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
SLS
System Logic
Semiconductor
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
