SL74HC374
Octal 3-State Noninverting D Flip-Flop
High-Performance Silicon-Gate CMOS
The SL74HC374 is identical in pinout to the LS/ALS374. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
Data meeting the setup and hold time is clocked to the outputs with
the rising edge of the Clock. The Output Enable input does not affect
the states of the flip-flops, but when Output Enable is high, the
outputs are forced to the high-impedance state; thus, data may be
stored even when the outputs are not enabled.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0
µA
•
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
SL74HC374N Plastic
SL74HC374D SOIC
T
A
= -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
PIN 20=V
CC
PIN 10 = GND
Inputs
Output
Enable
L
L
L
H
L,H,
X
Clock
D
H
L
X
X
Output
Q
H
L
no
change
Z
X = don’t care
Z = high impedance
SLS
System Logic
Semiconductor
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
