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SL74HC4046N 参数 Datasheet PDF下载

SL74HC4046N图片预览
型号: SL74HC4046N
PDF下载: 下载PDF文件 查看货源
内容描述: 锁相环 [Phase-Locked Loop]
分类和应用:
文件页数/大小: 12 页 / 136 K
品牌: SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
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SL74HC4046
DETAILED CIRCUIT DESCRIPTION
Voltage Controlled Oscillator/Demodulator Output
The VCO requires two or three external
components to operate. These are R1, R2, C1. Resistor
R1 and Capacitor C1 are selected to determine the
center frequency of the VCO (see typical performance
curves Figure 12). R2 can be used to set the offset
frequency with 0 volts at VCO input. For example, if R2
is decreased, the offset frequency is increased. If R2 is
omitted the VCO range is from 0 Hz. By increasing the
value of R2 the lock range of the PLL is increased and
the gain (volts/Hz) is decreased. Thus, for a narrow
lock range, large swings on the VCO input will cause
less frequency variation.
Internally, the resistors set a current in a current
mirror, as shown in Figure 5. The mirrored current
drives one side of the capacitor. Once the voltage
across the capacitor charges up to V
ref
of the
comparators, the oscillator logic flips the capacitor
which causes the mirror to change the opposite side of
the capacitor. The output from the internal logic is then
taken to VCO output (Pin4).
The input to the VCO is a very high impedance
CMOS input and thus will not load down the loop filter,
easing the filters design. In order to make signals at the
VCO input accessible without degrading the loop
performance, the VCO input voltage is buffered
through a unity gain Op-amp, to Demod Output. This
Op-amp can drive loads of 50K ohms or more and
provides no loading effects to the VCO input voltage
(see Figure 10).
An inhibit input is provided to allow disabling
of the VCO and all Op-amps (see Figure 5). This is
useful if the internal VCO is not being used. A logic
high on inhibit disables the VCO and all Op-amps,
minimizing standby power consumption.
The output of the VCO is a standard high speed
CMOS output with an equivalent LS-TTL fan out of 10.
The VCO output is approximately a square wave. This
output can either directly feed the COMP
IN
of the
phase comparators or feed external prescalers
(counters) to enable frequency synthesis.
Figure 5. Logic Diagram for VCO
SLS
System Logic
Semiconductor