SL74HC534
Octal 3-State Inverting D Flip-Flop
High-Performance Silicon-Gate CMOS
The SL74HC534 is identical in pinout to the LS/ALS534. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
Data meeting the setup time is clocked, in inverted form, to the
outputs with the rising edge of the Clock. The Output Enable input
does not affect the states of the flip-flops, but when Output Enable is
high, the outputs are forced to the high impedance state. Thus, data
may be stored even when the outputs are not enabled.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0
µA
•
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
SL74HC534N Plastic
SL74HC534D SOIC
T
A
= -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
PIN 20=V
CC
PIN 10 = GND
Output
Enable
L
L
L
H
L,H,
X
Clock
D
H
L
X
X
Output
Q
L
H
no
change
Z
X = don’t care
Z = high impedance
SLS
System Logic
Semiconductor
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
