SL74HCT138
1- of-8 Decoder/Demultiplexer
High-Performance Silicon-Gate CMOS
The SL74HCT138 is identical in pinout to the LS/ALS138. The
SL74HCT138 may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs.
The SL74HCT138 decodes a three-bit Address to one-of-eight
active-lot outputs. This device features three Chip Select inputs, two
active-low and one active-high to facilitate the demultiplexing,
cascading, and chip-selecting functions. The demultiplexing function is
accomplished by using the Address inputs to select the desired device
output; one of the Chip Selects is used as a data input while the other
Chip Selects are held in their active states.
•
TTL/NMOS Compatible Input Levels
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 4.5 to 5.5 V
•
Low Input Current: 1.0
µA
ORDERING INFORMATION
SL74HCT138N Plastic
SL74HCT138D SOIC
T
A
= -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
CS1 CS2 CS3
X X H
X H X
L X X
PIN 16 =V
CC
PIN 8 = GND
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
A2 A1 A0
X X X
X X X
X X X
L L L
L L H
L H L
L H H
H L L
H L H
H H L
H H H
Outputs
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
H H H H H H H H
H H H H H H H H
H H H H H H H H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L H H H
H L H H
H H L H
H H H L
H = high level (steady state)
L = low level (steady state)
X = don’t care
SLS
System Logic
Semiconductor
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
