IN74HC244
AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
25 °C to £85°C
-55°C
£125°C
Unit
ns
tPLH, tPHL Maximum Propagation Delay, A to YA or B to YB
(Figures 1 and 3)
2.0
4.5
6.0
96
18
15
115
23
20
135
27
23
tPLZ, tPHZ Maximum Propagation Delay , Output Enable to
YA or YB (Figures 2 and 4)
2.0
4.5
6.0
110
22
19
140
28
24
165
33
28
ns
ns
ns
tPZL, tPZH Maximum Propagation Delay , Output Enable to
YA or YB (Figures 2 and 4)
2.0
4.5
6.0
110
22
19
140
28
24
165
33
28
tTLH, tTHL Maximum Output Transition Time, Any Output
(Figures 1 and 3)
2.0
4.5
6.0
60
12
10
75
15
13
90
18
15
CIN
Maximum Input Capacitance
-
-
10
15
10
15
10
15
pF
pF
COUT
Maximum Three-State Output Capacitance
(Output in High-Impedance State)
Power Dissipation Capacitance (Per Buffer)
Typical @25°C,VCC=5.0 V
CPD
Used to determine the no-load dynamic power
consumption:
34
pF
PD=CPDVCC2f+ICCVCC
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Test Circuit
Figure 4. Test Circuit
System Logic
Semiconductor
SLS
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
