SL74LV138
3-TO-8 DECODER/DEMULTIPLEXER
By pinning SL74LV138 are compatible with SL74HC138 and
SL74HCT138 series. Input voltage levels are compatible with
standard CMOS ones.
•
Output voltage levels are compatible with input levels of CMOS,
NMOS and TTL IC
S
•
Supply voltage range is from 1.2 to 5.5 V
•
Low input current: 1.0
µÀ;
0.1
µÀ
at Ò = 25
°Ñ
•
Output current 6 mÀ
•
Latch current is not less than 150 mÀ at Ò = 125
°Ñ
•
ESD acceptable values: than 2000 V as per HBM, and not less
than 200 V as per MM
BLOCK DIAGRAM
Y0
ORDERING INFORMATION
SL74LV138N Plastic DIP
SL74LV138D SOIC
T
A
= -40° to 125° C
for all packages
Y1
PIN ASSIGNMENT
A0
A1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Y2
Y3
A0
A2
CS2
A1
Y4
Cs3
CS1
Y7
GND
Y5
A2
Y6
CS3
Y7
CS2
CS1
FUNCTION TABLE
CS1
X
X
L
H
H
H
H
H
H
H
H
System Logic
Semiconductor
INPUTS
CS2 CS3 A2
X
H
X
H
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
A1
X
X
X
L
L
H
H
L
L
H
H
A0
X
X
X
L
H
L
H
L
H
L
H
Q0
H
H
H
L
H
H
H
H
H
H
H
Q1
H
H
H
H
L
H
H
H
H
H
H
Q2
H
H
H
H
H
L
H
H
H
H
H
OUTPUTS
Q3 Q4
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
Q5
H
H
H
H
H
H
H
H
L
H
H
Q6
H
H
H
H
H
H
H
H
H
L
H
Q7
H
H
H
H
H
H
H
H
H
H
L
SLS
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
