34C60 参数 Datasheet PDF下载

TABLE OF CONTENTS

1

1.1

1.2

1.3

2

3

3.1

3.2

3.3

3.4

4

5

5.1

6

7

8

8.1

PIN CONFIGURATION ..........................................................................................................................................4

Buffer Type Descriptions...........................................................................................................................11

General Conventions .................................................................................................................................11

Reference Documents ...............................................................................................................................11

PPC34C60 BLOCK DESCRIPTION ....................................................................................................................12

DAISY CHAIN COMMAND PROTOCOL.............................................................................................................13

Peripheral System Design .........................................................................................................................14

Design Example .........................................................................................................................................15

Device Addressing .....................................................................................................................................16

Internal Register Map.................................................................................................................................18

REGISTER DESCRIPTIONS ...............................................................................................................................19

DRAM BUFFER OPERATION.............................................................................................................................29

Dram Physical Addressing........................................................................................................................30

SYSTEM DATA BUS CYCLES ...........................................................................................................................31

OPERATIONAL DESCRIPTION..........................................................................................................................34

TIMING DIAGRAMS ............................................................................................................................................36

DMA Transfer Cycle Timing ......................................................................................................................57

SMSC DS – PPC34C60

Page 3

Rev. 06/01/2001

ADVANCED INFORMATION