5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
Datasheet
Chapter 3
PLCC PIN
NO.
1-3
Description of Pin Functions
NAME
SYMBOL
DESCRIPTION
Address
0-2
4-6,8-12
Data 0-7
27
nRead/nData
Strobe
26
nWrite/
Direction
23
24
25
nReset in
nInterrupt
nChip Select
19,18
nPulse 2,
nPulse 1
20
Receive In
MICROCONTROLLER INTERFACE
A0/nMUX,
Input. On a non-multiplexed mode, A0-A2 are address
input bits. (A0 is the LSB) On a multiplexed address/data
A1,A2/ALE
bus, nMUX tied Low, A1 is left open, and ALE is tied to the
Address Latch Enable signal. A1 is connected to an internal
pull-up resistor.
AD0-AD2, D3-D7 Input/Output. On a non-multiplexed bus, these signals are
used as the data lines for the device. On a multiplexed
address/data bus, AD0-AD2 act as the address lines
(latched by ALE) and as the low data lines for the device.
D3-D7 are always used for data only. These signals are
connected to internal pull-up resistors.
nRD/nDS
Input. On a 68XX-like bus, nDS is an active low signal
issued by the microcontroller as the data strobe signal to
strobe the data onto the bus. On a 80XX-like bus, nRD is
an active low signal issued by the microcontroller to
indicate a read operation.
nWR/DIR
Input. On a 68XX-like bus, DIR is issued by the
microcontroller as the Read/nWrite signal to determine the
direction of data transfer. In this case, a logic "1" selects a
read operation, while a logic "0" selects a write operation.
In this case, data is actually strobed by the nDS signal. On
an 80XX-like bus, nWR is an active low signal issued by
the microcontroller to indicate a write operation. In this
case, a logic "0" on this pin, when the COM20020ID is
accessed, enables data from the data bus to be written to
the device.
nRESET
Input. This active low signal executes a hardware reset.
nINTR
Output. This active low signal is generated by the
COM20020ID when an enabled interrupt condition occurs.
nCS
Input. This active low signal selects the COM20020ID for
an access.
TRANSMISSION MEDIA INTERFACE
nPULSE2,
Output (nPULSE1), Input/Output (nPULSE2). In Normal
Mode, these active low signals carry the transmit data
nPULSE1
information, encoded in pulse format, as DIPULSE
waveform. When the device is in Backplane Mode, the
nPULSE1 signal driver is programmable (push/pull or open-
drain), while the nPULSE2 signal provides a clock with
frequency of double the data rate. nPULSE1 is connected
to a weak internal pull-up resistor on the open/drain driver
in backplane mode.
RXIN
Input. This signal carries the receive data information from
the line transceiver.
SMSC COM20020I Rev D
Page 9
Revision 12-05-06
DATASHEET
SMSC [ SMSC CORPORATION ]
