1°C Temperature Sensor with Hardware Thermal Shutdown
Datasheet
Table 6.9 Therm Limit Registers (continued)
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
21h
R/W
THERM
Hysteresis
128
64
32
16
8
4
2
1
0Ah
(10°C)
6.9
External Diode Fault Register
Table 6.10 External Diode Fault Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
-
External
Diode Fault
-
1Bh
R-C
-
-
-
-
FLT
-
00h
The External Diode Fault Register indicates which of the external diodes caused the FAULT bit in the
Status Register to be set. This register is cleared when it is read.
Bit 1 - FLT - This bit is set if the External Diode channel reported a diode fault.
6.10
Software Thermal Shutdown Configuration Register
Table 6.11 Software Thermal Shutdown Configuration Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Software
Thermal
Shutdown
Configuration
-
-
1Dh
R/W
-
-
-
-
EXTSYS
INTSYS
00h
The Software Thermal Shutdown Configuration Register controls whether any of the software channels
will assert the SYS_SHDN pin. If a channel is enabled, the temperature is compared against the
corresponding THERM Limit. If the measured temperature exceeds the THERM Limit, then the
SYS_SHDN pin is asserted. This functionality is in addition to the Hardware Shutdown circuitry.
Bit 1 - EXTSYS - configures the External Diode channel to assert the SYS_SHDN pin based on the
THERM Limit.
‘0’ (default) - the External Diode channel is not linked to the SYS_SHDN pin. If the temperature
exceeds the THERM Limit, the ETHERM status bit is set but the SYS_SHDN pin is not asserted.
‘1’ - the External Diode channel is linked to the SYS_SHDN pin. If the temperature exceeds the
THERM Limit, the ETHERM status bit is set and the SYS_SHDN pin is asserted. It will remain
asserted until the temperature drops below the THERM Limit minus the THERM Hysteresis.
Bit 0 - INTSYS - configures the Internal Diode channel to assert the SYS_SHDN pin based on it’s
respective THERM Limit.
‘0’ (default) - the Internal Diode channel is not linked to the SYS_SHDN pin. If the temperature
exceeds it’s THERM Limit, the ITHERM status bit is set but the SYS_SHDN pin is not asserted.
‘1’ - the Internal Diode channel is linked to the SYS_SHDN pin. If the temperature exceeds it’s
THERM Limit, the ITHERM status bit is set and the SYS_SHDN pin is asserted. It will remain
asserted until the temperature drops below it’s THERM Limit minus the THERM Hysteresis.
Revision 1.24 (02-05-08)
SMSC EMC1422
DATA3S0HEET
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