Multiple RPM-Based PWM Fan Controller
Datasheet
where:
poles = number of poles of the fan
(typically 2)
1
-
(
n
–
1
)
-
RPM
= -------------------
×
---------------------------------
×
f
TACH
×
60
(
poles
)
1
-
COUNT
×
----
m
f
TACH
= the tachometer
measurement frequency (typically
32.768kHz)
n = number of edges measured
(typically 5 for a 2 pole fan)
m = the multiplier defined by the
RANGE bits
[3]
COUNT = TACH Reading Register
value (in decimal)
[2]
3,932,160
×
m
-
RPM
= -------------------------------------
COUNT
5.19
Software Lock Register
Table 5.29 Software Lock Register
ADDR
EFh
R/W
R/W
REGISTER
Software
Lock
B7
-
B6
-
B5
-
B4
-
B3
-
B2
-
B1
-
B0
LOCK
DEFAULT
00h
The Software Lock Register controls the software locking of critical registers. This register is software
locked.
Bit 0 - LOCK - this bit acts on all registers that are designated SWL. When this bit is set, the locked
registers become read only and cannot be updated.
‘0’ (default) - all SWL registers can be updated normally.
‘1’ - all SWL registers cannot be updated and a hard-reset is required to unlock them.
5.20
Product Features Register
Table 5.30 Product Features Register
ADDRESS
FCh
R/W
R
REGISTER
Product
Features
B7
-
B6
-
B5
B4
ADR[2:0]
B3
B2
B1
B0
DEFAULT
00h
FAN_SPD [2:0]
The Product Features register shows those functions that are enabled by external pin states.
Bits 5-3 - ADR[2:0] - Indicates the selected SMBus address as determined by the ADDR_SEL pin.
SMSC EMC2303
43
Revision 1.1 (10-12-09)
DATASHEET
SMSC [ SMSC CORPORATION ]
