LAN83C185
High Performance Single
Chip Low Power 10/100
Ethernet Physical Layer
Transceiver (PHY)
Datasheet
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Product Features
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Single Chip Ethernet Phy
Fully compliant with IEEE 802.3/802.3u standards
10BASE-T and 100BASE-TX support
Supports Auto-negotiation and Parallel Detection
Automatic Polarity Correction
Integrated DSP with Adaptive Equalizer
Baseline Wander (BLW) Correction
Media Independent Interface (MII)
802.3u compliant register functions
Vendor Specific register functions
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Comprehensive power management features
General power-down mode
Energy Detect power-down mode
Low profile 64-pin TQFP package; green, lead-free
package also available
Single +3.3V supply with 5V tolerant I/O
0.18 micron technology
Low power consumption
Operating Temperature 0° C to 70° C
Internal +1.8V Regulator
Applications
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LAN on Motherboard
10/100 PCMCIA/CardBus Applications
Embedded Telecom Applications
Video Record/Playback Systems
Cable Modems And Set-Top Boxes
Digital Televisions
Wireless Access Points
ORDERING INFORMATION
Order Number(s):
LAN83C185-JD for 64 pin TQFP package
LAN83C185-JT for 64 pin TQFP package (green, lead-free)
SMSC LAN83C185
DATASHEET
Rev. 0.8 (11-16-04)