Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
7.2.1
100BASE-TX Transmit
The 100BASE-TX transmit data path is shown in Figure 7.2. Shaded blocks are those which are
internal to the PHY. Each major block is explained in the following sections.
100M
PLL
Internal
MII Transmit Clock
Port x
MAC
MII MAC
Interface
4B/5B
Encoder
Scrambler
and PISO
Internal
MII 25 MHz by 4 bits
25MHz
by 4 bits
25MHz by
5 bits
125 Mbps Serial
NRZI
Converter
MLT-3
Converter
100M
TX Driver
NRZI
MLT-3
MLT-3
Magnetics
MLT-3
MLT-3
RJ45
CAT-5
Figure 7.2 100BASE-TX Transmit Data Path
MII MAC Interface
7.2.1.1
7.2.1.2
For a transmission, the Switch Fabric MAC drives the transmit data to the PHYs MII MAC Interface.
The MII MAC Interface is described in detail in Section 7.2.7, "MII MAC Interface".
Note: The PHY is connected to the Switch Fabric MAC via standard MII signals. Refer to the IEEE
802.3 specification for additional details.
4B/5B Encoder
The transmit data passes from the MII block to the 4B/5B Encoder. This block encodes the data from
4-bit nibbles to 5-bit symbols (known as “code-groups”) according to Table 7.2. Each 4-bit data-nibble
is mapped to 16 of the 32 possible code-groups. The remaining 16 code-groups are either used for
control information or are not valid.
The first 16 code-groups are referred to by the hexadecimal values of their corresponding data nibbles,
0 through F. The remaining code-groups are given letter designations with slashes on either side. For
example, an IDLE code-group is /I/, a transmit error code-group is /H/, etc.
Revision 1.3 (08-27-09)
SMSC LAN9303/LAN9303i
DATA9S0HEET
SMSC [ SMSC CORPORATION ]
