DESCRIPTION OF PIN FUNCTIONS
PIN
No./
QFP
BUFFER
TYPE
BUFFER
TYPE
PER
FUNCTION
(NOTE 1)
PCI_IO
PCI_I
PCI_O
PCI_I
PCI_I
PCI_ICLK
PCI_IO
IS
IS
(I/O8/OD8)/I
(I/O8/OD8)/I
(I/O12/OD12)/
(O12/OD12)
(I/O12/OD12)/
(O12/OD12)
IS/(IS/O8/OD8)
O12/(I/O12/
OD12)
5,6
4
4
3
2
NAME
TOTAL
SYMBOL
NOTES
23:20
24
25
26
27
29
30
6
19
51
52
54
55
61
62
53,
65,93
7, 31,
60,76
40
44
18
16
11
10
12
8
9
4
5
PROCESSOR/HOST LPC INTERFACE (10)
Multiplexed Command,
4
LAD[3:0]
PCI_IO
Address, Data [3:0]
Frame
1
nLFRAME
PCI_I
Encoded DMA Request
1
nLDRQ
PCI_O
PCI Reset
1
nPCI_RESE
PCI_I
T
Power Down
1
nLPCPD
PCI_I
PCI Clock
1
PCI_CLK
PCI_ICL
K
Serial IRQ
1
SER_IRQ
PCI_IO
CLOCKS (2)
32.768 Trickle Clock
1
CLOCKI32
IS
Input
14.318MHz Clock Input
1
CLOCKI
IS
FAN CONTROL (4)
General Purpose I/O
1
GP30/
IO8
FAN_TACH2
/Fan Tachometer 2
General Purpose I/O
1
GP31/
IO8
FAN_TACH1
/Fan Tachometer 1
General Purpose I/O
1
GP32/FAN2
IO12
/Fan Speed Control 2
General Purpose I/O
1
GP33/FAN1
IO12
/Fan Speed Control 1
INFRARED INTERFACE (2)
Infrared Rx
1
IRRX2/GP34 IS/O8
/General Purpose I/O
Infrared Tx
1
IRTX2/GP35 IO12
/General Purpose I/O
POWER PINS (10)
Power
3
VCC
Ground
Analog Ground
Reference Voltage
Trickle Voltage
Read Disk Data
Write Gate
Write Disk Data
Head Select
Step Direction
Step Pulse
Disk Change
Drive Select 0
4
VSS
1
AVSS
1
VREF
1
VTR
FDD INTERFACE (14)
1
nRDATA
IS
1
nWGATE
O12
1
nWDATA
O12
1
nHDSEL
O12
1
nDIR
O12
1
nSTEP
O12
1
nDSKCHG
IS
1
nDS0
O12
7
IS
(O12/OD12)
(O12/OD12)
(O12/OD12)
(O12/OD12)
(O12/OD12)
IS
(O12/OD12)
Page 6
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