Table 59
−
GPIO Read/Write Behavior ......................................................................................................................120
Table 60
−
Runtime Register Block Summary – Power On Elapsed Time Counters .................................................123
Table 61 – Different Modes for Fan............................................................................................................................124
Table 62
−
SMBus Runtime Registers .......................................................................................................................129
Table 63
−
SMBus Control/Status Register (SMBus/Base Address)..........................................................................130
Table 64
−
Instruction Table for Serial Bus Control....................................................................................................131
Table 65
−
SMBus Own Address Register (SMBus Base Address +1)......................................................................133
Table 66
−
SMBus Data Register (SMBus Base Address +2)....................................................................................133
Table 67
−
SMBus Clock Register (SMBus Base Address +3) ..................................................................................133
Table 68
−
SMBus Clock Select Encoding .................................................................................................................134
Table 69
−
Command Codes .....................................................................................................................................137
Table 70
−
SMBus2/LPC Arbitration Summary ..........................................................................................................138
Table 71
−
SMBus2 Register Mapping Summary ......................................................................................................139
Table 72
−
SMBus 2 SMB_COM2 Register Description ............................................................................................139
Table 73
−
COM Port 2 Inactive Signal State.............................................................................................................140
Table 74
−
SMBus 2 SMB_DDR Register description................................................................................................140
Table 75
−
SMBus2, SMB_ARB Arbitration Register .................................................................................................141
Table 76
−
LCD Controller Connections.....................................................................................................................146
Table 77
−
LCD Controller Operations .......................................................................................................................146
Table 78
−
SMI/PME Generation ...............................................................................................................................148
Table 79. Runtime Register Block Summary ............................................................................................................156
Table 80
−
Runtime Registers Block Description .......................................................................................................160
Table 81
−
LPC47S45x Configuration Registers Summary .......................................................................................185
Table 82
−
Chip Level Registers ................................................................................................................................185
Table 83
−
Logical Device Registers..........................................................................................................................185
Table 84
−
I/O Base Address Configuration Register Description..............................................................................185
Table 85
−
Interrupt Select Configuration Register Description..................................................................................185
Table 86
−
DMA Channel Select Configuration Register Description.........................................................................185
Table 87
−
Floppy Disk Controller, Logical Device 0 [Logical Device Number = 0x00] ..............................................185
Table 88
−
Parallel Port, Logical Device 3 [Logical Device Number = 0x03]..............................................................185
Table 89
−
Serial Port 1, Logical Device 4 [Logical Device Number = 0x04]..............................................................185
Table 90
−
Serial Port 2, Logical Device 5 [Logical Device Number = 0x05]..............................................................185
Table 91
−
RTC, Logical Device 6 [Logical Device Number = 0x06] ..........................................................................185
Table 92
−
KYBD, Logical Device 7 [Logical Device Number = 0x07] .......................................................................185
Table 93
−
X-Bus, Logical Device 8 [Logical Device Number = 0x08] .......................................................................185
Table 94
−
Runtime Registers, Logical Device A .......................................................................................................185
Table 95
−
SMBus [Logical Device Number = 0x0B] .................................................................................................185
SMSC LPC47S45x
Page 7 of 259
Rev. 06-01-06
DATASHEET