Hi-Speed USB Device PHY with UTMI Interface
Datasheet
Chapter 2 Functional Block Diagram
XO
XI
PWR
Control
VDD3.3
1.8V
Regulator
TX
LOGIC
TX State
Machine
Parallel to
Serial
Conversion
Bit Stuff
NRZI
Encode
PLL and
XTAL OSC
System
Clocking
TX
RPU_EN
1.5kΩ
VPO
VMO
OEB
HS_DATA
HS_DRIVE_ENABLE
HS_CS_ENABLE
FS
TX
RESET
SUSPENDN
XCVRSELECT
TERMSELECT
OPMODE[1:0]
HS
TX
DP
LINESTATE[1:0]
CLKOUT
R
X
DM
UTMI
Interface
RX
LOGIC
RX State
Machine
Serial to
Parallel
Conversion
Bit Unstuff
VP
VM
FS SE+
DATA[7:0]
TXVALID
TXREADY
FS SE-
Clock
Recovery Unit
Clock
and
Data
Recovery
Elasticity
Buffer
FS RX
MUX
RXVALID
RXACTIVE
RXERROR
NRZI
Decode
HS RX
BIASING
Bandgap Voltage Reference
Current Reference
HS SQ
Figure 2.1 USB3280 Block Diagram
SMSC USB3280
RBIAS
DATASHEET
7
Revision 1.2 (10-27-06)
SMSC [ SMSC CORPORATION ]
