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USB3813-1080XY 参数 Datasheet PDF下载

USB3813-1080XY图片预览
型号: USB3813-1080XY
PDF下载: 下载PDF文件 查看货源
内容描述: USB 2.0高速3端口集线器控制器经过优化,用于便携式应用 [USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications]
分类和应用: 控制器便携式
文件页数/大小: 68 页 / 882 K
品牌: SMSC [ SMSC CORPORATION ]
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USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications  
Datasheet  
6.3  
Device Configuration Straps  
Configuration straps are multi-function pins that are driven as outputs during normal operation. During  
a Power-On Reset (POR) or an External Chip Reset (RESET_N), these outputs are tri-stated. The high  
or low state of the signal is latched following de-assertion of the reset and is used to determine the  
default configuration of a particular feature. Configuration straps are latched as a result of a Power-On  
Reset (POR) or a External Chip Reset (RESET_N). Configuration strap signals are noted in Chapter 3,  
"Ball Descriptions," on page 10 and are identified by an underlined symbol name. The following sub-  
sections detail the various configuration straps.  
Configuration straps include internal resistors in order to prevent the signal from floating when  
unconnected. If a particular configuration strap is connected to a load, an external pull-up or pull-down  
should be used to augment the internal resistor to ensure that it reaches the required voltage level  
prior to latching. The internal resistor can also be overridden by the addition of an external resistor.  
Note: The system designer must guarantee that configuration straps meet the timing requirements  
specified in Section 9.5.2, "Reset and Configuration Strap Timing," on page 63 and Section  
9.5.1, "Power-On Configuration Strap Valid Timing," on page 62. If configuration straps are not  
at the correct voltage level prior to being latched, the device may capture incorrect strap  
values.  
Note: Configuration straps must never be driven as inputs. If required, configuration straps can be  
augmented, or overridden with external resistors.  
6.3.1  
SPI Speed Select (SPI_SPD_SEL)  
This strap is used to select the speed of the SPI as follows:  
Table 6.1 SPI_SPD_SEL Configuration Definitions  
SPI_SPD_SEL  
DEFINITION  
‘0’  
‘1’  
30 MHz SPI Operation (Default)  
60 MHz SPI Operation  
Note: If the latched value on reset is 1, this pin is tri-stated when the chip is in the suspend state. If  
the latched value on reset is 0, this pin is driven low during a suspend state.  
SMSC USB3813  
27  
Revision 1.0 (06-17-13)  
DATASHEET