USB97C210
USB 2.0 Flash Media
Controller
Datasheet
Product Features
Complete USB Specification 2.0 Compatibility
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Includes USB 2.0 Transceiver
A Bi-directional Control and a Bi-directional Bulk
Endpoint are provided.
8051 8 bit microprocessor
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Provides low speed control functions
30 Mhz execution speed at 4 cycles per instruction
average
12K Bytes of internal SRAM for general purpose
scratchpad
768 Bytes of internal SRAM for general purpose
scratchpad or program execution while re-flashing
external ROM
Bi-directional 512 Byte Buffer for Bulk Endpoint
64 Byte RX Control Endpoint Buffer
64 Byte TX Control Endpoint Buffer
64K Byte Code Space
Flash, SRAM, or EPROM Memory
Complete System Solution for interfacing
CompactFlash
TM
(CF), SmartMedia
TM
(SM),
Memory Stick
TM
(MS), and Secure Digital (SD)
and MultiMediaCard
TM
(MMC) devices to USB 2.0
bus*
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Supports USB Bulk Only Mass Storage Compliant
Bootable BIOS
Support for the following devices:
CompactFlash
SmartMedia
XD Card
Memory Stick, Memory Stick Pro, HS Memory
Stick
Secure Digital
MultiMediaCard
NAND Flash drive
CF form factor ATA hard drives
Support for simultaneous operation of all above
devices. (only one at a time of each of the
following groups supported: CF or ATA drive, SM
or XD or NAND, SD or MMC)
Enhanced CF support to allow true sequential read
operations to improve throughput
Double Buffered Bulk Endpoint
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External Program Memory Interface
On Board 12Mhz Crystal Driver Circuit
Internal PLL for 480Mhz USB2.0 Sampling,
30Mhz MCU clock
Supports firmware upgrade via USB bus if “boot
block” Flash program memory is used
2.5 Volt, Low Power Core Operation
3.3 Volt I/O with 5V input tolerance
128 Pin TQFP (1.0 mm height package) or QFP
Package
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16 GPIOs for special function use: LED
indicators, button inputs, power control to
memory devices, etc.
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Inputs capable of generating interrupts with either
edge sensitivity
One GPIO has automatic 1 sec toggle capability
for flashing an LED indicator.
SMSC USB97C210
Page 1
Revision 1.5 (11-05-03)
DATASHEET