CXA1372BQ/BS
Pin No.
Q
S
Symbol
I/O
Equivalent circuit
Description
147
16
22
FSET
I
16
15k
15k
Sets the peak frequency of focus
tracking phase compensation.
147
17
23 ISET
I
17
Current is input to determine focus
search, track jump, and sled kick
level.
7µA
147
18
18
24
SSTOP
I
Limit SW ON/OFF signal detection
for disc innermost track detection.
20
26
DIRC
I
Used for 1-track jump. Contains a
47kΩ pull-up resistor.
At "Low" sled overrun prevention
circuit operates. Contains a 47kΩ
pull-up resistor.
47k
147
15µA
21
27
LOCK
I
20
21
22
28
CLK
I
22
23
24
Serial data transfer clock input from
CPU. (no pull-up resistor)
Latch input from CPU.
(no pull-up resistor)
Serial data input from CPU.
(no pull-up resistor)
Reset input, reset at "Low".
(no pull-up resistor)
23
24
25
29
30
31
XLT
DATA
XRST
I
I
I
25
26
32
C. OUT
O
20k
147
26
27
Track number count signal output.
27
33
SENS
O
100k
Outputs FZC, AS, TZC and SSTOP
through command from CPU.
–6–
SONY [ SONY CORPORATION ]
