CXA3541N
No.
U1
U2
U3
U4
U5
U6
U7
Item
Write head open threshold
Head voltage when short to
GND
WD frequency too low
Write safety detect time
Low V
CC
threshold
Low V
CC
threshold
Symbol
Rop
V
G
f
WDL
Tws
V
WthL
V
WthH
Measurement conditions
Detect open head
Detect short to GND
Min.
Typ.
1.2
Max.
1.4
0.1
Unit
V
V
MHz
ns
V
V
mV
Write Safety Characteristics
0.5
T1: 2 transitions on WDX/WDY
Fault detected
Fault removed
3.7
3.9
3.9
4.1
200
Signal on WDX/WDY
90% RD signal or 10% I
W
90% I
W
90% RD signal
90% RD signal, 90% I
B
∗
1
I
B
= "011"
90% I
W
10% I
W
90% I
W
600
1.8
300
+ T1
4.1
4.3
Low V
CC
threshold hysteresis Vhys
Iw = 29.5mA, I
B
= 5.9mA
T
WR
T
RW
T
IR
T
SR1
Switching Characteristics
S1
S2
S3
S4
Write to Read
Read to Write
Idle to Read
Sleep to Read
300
50
500
70
1.0
2000
ns
ns
µs
µs
Bank Write Characteristics
S5
S6
S7
Read to Bank write
Bank write to Read
Idle to Bank write
Idle to Write
Setup time
Hold time
SCLK frequency
SCLK pulse width
Iw = 29.5mA, I
B
= 5.9mA
T
RB
T
BR
T
IW
100
100
300
ns
ns
µs
Serial Port Timing
B1
B2
B4
B5
B6
B7
B8
T
SU
(sden) SDEN to first SCLK
Th (sden)
f (sclk)
Tw (sclk)
T
SU
(d)
Th (d)
T
SL
10
10
10
100
Last SCLK to deassert SDEN
30
15
30
ns
ns
MHz
ns
ns
ns
ns
SCLK – SDATA setup time
SCLK – SDATA hold time
SDEN low time
∗
1
T
SR
is proportional to I
B
and external CAP value.
–8–
SONY [ SONY CORPORATION ]
