CXD1159AQ
Functions
1. Generation of various sync signals (See the Timing Chart.)
Various sync signals are generated from clocks.
• Clock frequencies
NTSC: 910f
H
(14.31818MHz)
PAL: 908f
H
(14.1875MHz)
4fsc (17.734475MHz)
For the system clock
NTSC: 910f
H
/7
PAL:
908f
H
/7 or 6
2. PAL PLL for 4fsc
To the master clock of 908f
H
is matched a phase of 4fsc. The polarity of the phase comparator can be switched
according to the type of external filter (passive or active).
Filter
Passive
PSEL
L
Master
(908f
H
)
Fast
Slow
Fast
Slow
4fsc
Delay
Fast
Delay
Fast
COMP
H
L
L
H
Active
H
3. SC (Sub-Carrier) generation
INT: Internal mode
(EXT = L)
EXT: External mode
(EXT = H)
Mode
NTSC
NTSC
PAL
INT or EXT
INT
EXT
x
SC
910f
H
/4
4fsc/4
4fsc/4
In either mode unused counters are stopped. When SC is not required, by setting SCOF to L all SC counters
are stopped and SC is not output.
4. Initialization and Reset
In INT mode the circuit is initialized with the fall of VINT. At that time, H, V and LALT resets are not accepted.
In EXT mode, VINT is not accepted, whereas H, V and LALT resets are accepted.
–5–
SONY [ SONY CORPORATION ]
