CXD2442Q
Pin
No.
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
Symbol
SHD1
SHD2
SHD3
SHD4
Vss
SH1
SH2
SH3
Vss
SH4
SH5
SH6
SH7
SH8
V
DD
RGT
XRGT
MODE3
Vss
MODE2
MODE1
HST
HCK1
HCK2
BLK
CLR
ENB
VCK
VST
Vss
TST7
PCG
TST8
DWN
I/O
O
O
O
O
—
O
O
O
—
O
O
O
O
O
—
O
O
O
—
O
O
O
O
O
O
O
O
O
O
—
—
O
—
O
Description
Sample-and-hold pulse 1 output (for driver/positive polarity)
Sample-and-hold pulse 2 output (for driver/positive polarity)
Sample-and-hold pulse 3 output (for driver/positive polarity)
Sample-and-hold pulse 4 output (for driver/positive polarity)
GND
Sample-and-hold pulse 1 output (for high voltage drive sample and hold/positive polarity)
Sample-and-hold pulse 2 output (for high voltage drive sample and hold/positive polarity)
Sample-and-hold pulse 3 output (for high voltage drive sample and hold/positive polarity)
GND
Sample-and-hold pulse 4 output (for high voltage drive sample and hold/positive polarity)
Sample-and-hold pulse 5 output (for high voltage drive sample and hold/positive polarity)
Sample-and-hold pulse 6 output (for high voltage drive sample and hold/positive polarity)
Sample-and-hold pulse 7 output (for high voltage drive sample and hold/positive polarity)
Sample-and-hold pulse 8 output (for high voltage drive sample and hold/positive polarity)
Power supply
Right/left inversion discrimination signal output (High: Right, Low: Left)
Right/left inversion discrimination signal output (High: Left, Low: Right)
Mode switching pin 3 output
GND
Mode switching pin 2 output
Mode switching pin 1 output
H start pulse output
H clock 1 pulse output
H clock 2 pulse output
BLK pulse output (positive polarity)
CLR pulse output (positive polarity)
ENB pulse output (negative polarity)
V clock pulse output
V start pulse output
GND
Test pin (Not connected.)
PCG pulse output (positive polarity)
Test pin (Not connected.)
Up/down inversion discrimination signal output (High: Down, Low: Up)
Input pin for
open status
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–4–
SONY [ SONY CORPORATION ]
