CXD3011R-1
Pin
No.
41
42
43
44
45
46
47
48
49
50
51
52
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
74
75
76
77
78
79
Symbol
DA08
DA07
DV
DD
2
DA06
DA05
DA04
DA03
DA02
DA01
DV
SS
2
XTSL
MCKO
FSTIO
C4M
C16M
DV
DD
3
MD2
DOUT
MUTE
WFCK
SCOR
SBSO
EXCK
SQSO
SQCK
SCSY
XRST
XWO
RMUTO
LMUTO
DV
SS
3
AV
SS
4
PWMRN
O
I
O
I
O
O
O
I
O
I
I
I
I
O
O
I
O
I/O
O
O
O
O
O
O
O
O
O
O
I/O
1, 0
1, 0
Description
DA08 output when PSSL = 1, GFS output when PSSL = 0.
DA07 output when PSSL = 1, RFCK output when PSSL = 0.
Digital power supply.
1, 0
1, 0
1, 0
1, 0
1, 0
1, 0
DA06 output when PSSL = 1, C2PO output when PSSL = 0.
DA05 output when PSSL = 1, XRAOF output when PSSL = 0.
DA04 output when PSSL = 1, MNT3 output when PSSL = 0.
DA03 output when PSSL = 1, MNT2 output when PSSL = 0.
DA02 output when PSSL = 1, MNT1 output when PSSL = 0.
DA01 output when PSSL = 1, MNT0 output when PSSL = 0.
Digital GND.
Crystal selection input.
1, 0
1, 0
1, 0
1, 0
Clock output. Inverted output of XTLI.
Digital servo clock input/output.
(2/3 frequency division for XTLI pin is internally connected.)
1/4 frequency division output for XTLI pin. Changes with variable pitch.
16.9344MHz output. Changes simultaneously with variable pitch.
Digital power supply.
Digital Out on/off control (low = off, high = on).
1, 0
Digital Out output.
Mute (low: off, high: on).
1, 0
1, 0
1, 0
WFCK (Write Frame Clock) output.
Outputs a high signal when either subcode sync S0 or S1 is detected.
Sub P to W serial output.
SBSO readout clock input.
1, 0
Sub-Q 80-bit, PCM peak and level data 16-bit outputs.
SQSO readout clock input.
GRSCOR resynchronization input. Normally low, resynchronization is
executed when high.
System reset. Reset when low.
Audio DAC sync window open input. Normally high, window open when low.
1, 0
1, 0
Audio DAC right channel zero detection flag.
Audio DAC left channel zero detection flag.
Digital GND.
Analog GND.
1, Z, 0
Audio DAC PWM output. Right channel, reversed phase.
–6–
SONY [ SONY CORPORATION ]
