欢迎访问ic37.com |
会员登录 免费注册
发布采购

CXD3048R 参数 Datasheet PDF下载

CXD3048R图片预览
型号: CXD3048R
PDF下载: 下载PDF文件 查看货源
内容描述: CD数字信号处理器,内置数字伺服+防震内存控制器+数字高和低音增强 [CD Digital Signal Processor with Built-in Digital Servo + Shock-proof Memory Controller + Digital High & Bass Boost]
分类和应用: 内存控制器数字信号处理器
文件页数/大小: 205 页 / 1481 K
品牌: SONY [ SONY CORPORATION ]
 浏览型号CXD3048R的Datasheet PDF文件第2页浏览型号CXD3048R的Datasheet PDF文件第3页浏览型号CXD3048R的Datasheet PDF文件第4页浏览型号CXD3048R的Datasheet PDF文件第5页浏览型号CXD3048R的Datasheet PDF文件第6页浏览型号CXD3048R的Datasheet PDF文件第7页浏览型号CXD3048R的Datasheet PDF文件第8页浏览型号CXD3048R的Datasheet PDF文件第9页  
CXD3048R
CD Digital Signal Processor with Built-in Digital Servo +
Shock-proof Memory Controller + Digital High & Bass Boost
Description
The CXD3048R is a digital signal processor LSI for CD
players. This LSI incorporates a digital servo, high & bass
boost, shock-proof memory controller, 1-bit DAC and
analog low-pass filter.
Features
All digital signal processing during playback is
performed with a single chip
Highly integrated mounting possible due to a built-in RAM
Digital Signal Processor (DSP) Block
Supports CAV (Constant Angular Velocity) playback
Frame jitter free
0.5× to 4× speed continuous playback possible
Allows relative rotational velocity readout
Wide capture range playback mode
Spindle rotational velocity following method
Supports 1× to 4× speed playback
Supports variable pitch playback
The bit clock, which strobes the EFM signal, is
generated by the digital PLL.
EFM data demodulation
Enhanced EFM frame sync signal protection
Refined super strategy-based powerful error correction
C1: double correction, C2: quadruple correction
Supported during 4× speed playback
Noise reduction during track jumps
Auto zero-cross mute
Subcode demodulation and subcode-Q data error
detection
Digital spindle servo
16-bit traverse counter
Asymmetry correction circuit
CPU interface on serial bus
Error correction monitor signal, etc. output from a new
CPU interface
Servo auto sequencer
Fine search performs track jumps with high accuracy
Digital audio interface outputs
Digital level meter, peak meter
Bilingual compatible
VCO control mode
CD TEXT data demodulation
Digital Out can be generated from the audio serial
input. (also supported after shock-proof and digital
bass boost processing, subcode-Q addition function)
Digital Servo (DSSP) Block
Microcomputer software-based flexible servo control
Offset cancel function for servo error signal
Auto gain control function for servo loop
E:F balance, focus bias adjustment functions
Surf jump function supporting micro two-axis
Tracking filter: 6 stages
Focus filter: 5 stages
Shock-proof Memory Controller Block
Supports an external 4M-bit/16M-bit DRAM
Time axis-based data linking
ADPCM compression method (uncompressed/4 bits/
6 bits/8 bits)
120 pin LQFP (Plastic)
Digital Filter, DAC and Analog Low-pass Filter Blocks
Digital dynamic bass boost and high boost
Bass Boost: 4th-order IIR 24dB/Oct
+10dB/+14dB/+18dB/+22dB
High Boost: Second-order IIR 12dB/Oct
+4dB/+6dB/+8dB/+10dB
Independent turnover frequency selection possible
Bass Boost: 125Hz/160Hz/200Hz
High Boost: 5kHz/7kHz
Digital dynamics (compressor)
Volume increased by +5dB at low level
8× oversampling digital filter
(attenuation: 61dB, ripple within band: ±0.0075dB)
Digital signal output possible after boost
Serial data format selectable from (output) 20 bits/
18 bits/16 bits (rearward truncation, MSB first)
Digital attenuation: –
∞,
–60 to +6dB, 2048 steps (linear)
Soft mute
Digital de-emphasis
High-cut filter
Applications
CD players
Structure
Silicon gate CMOS IC
Absolute Maximum Ratings
Supply voltage V
DD
, AV
DD
Vss – 0.5 to +3.5
V
Input voltage
V
I
Vss – 0.3 to V
DD
+ 0.3 V
Output voltage V
O
Vss – 0.3 to V
DD
+ 0.3 V
Storage temperature Tstg
–55 to +150
°C
Supply voltage difference
AV
SS
– V
SS
–0.3 to +0.3
V
AV
DD
– V
DD
–0.3 to +0.3V (AV
DD
< 1.7V)
AV
DD
– V
DD
–0.3 to +1.0V (AV
DD
= 1.7 to 2.7V)
Recommended Operating Conditions
Supply voltage
V
DD
, AV
DD
0, 3, XV
DD
1.7 to 2.7
V
DD
to 2.7
AV
DD
1, 2, DV
DD
Operating temperature Topr
–20 to +75
I/O Pin Capacitance
Input capacitance
C
I
Output capacitance
C
O
Note)
Measurement conditions
7 (max.)
7 (max.)
V
DD
= V
I
= 0V
f
M
= 1MHz
V
V
°C
pF
pF
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E02653A37