CXD3068Q
CD Digital Signal Processor with Built-in Digital Servo
Description
The CXD3068Q is a digital signal processor LSI for
CD players. This LSI incorporates a digital servo.
Features
•
All digital signal processings during playback are
performed with a single chip
•
Highly integrated mounting possible due to a built-
in RAM
Digital Signal Processor (DSP) Block
•
Playback mode supporting CAV (Constant Angular
Velocity)
•
Frame jitter free
•
0.5× to 4× continuous playback possible
•
Allows relative rotational velocity readout
•
Wide capture range playback mode
•
Spindle rotational velocity following method
•
Supports 1× to 4× playback variable pitch
playback
•
Bit clock, which strobes the EFM signal, is
generated by the digital PLL.
•
EFM data demodulation
•
Enhanced EFM frame sync signal protection
•
Refined super strategy-based powerful error
correction
C1: double correction, C2: quadruple correction
Supported during 4× playback
•
Noise reduction during track jumps
•
Auto zero-cross mute
•
Subcode demodulation and Sub-Q data error
detection
•
Digital spindle servo
•
16-bit traverse counter
•
Asymmetry correction circuit
•
CPU interface on serial bus
•
Error correction monitor signal, etc. output from a
new CPU interface
•
Servo auto sequencer
•
Fine search performs track jumps with high
accuracy
•
Digital audio interface output
•
Digital level meter, peak meter
•
Bilingual supported
•
VCO control mode
•
CD TEXT data demodulation
•
EFM playability reinforcement function
Digital Servo (DSSP) Block
•
Microcomputer software-based flexible servo control
•
Offset cancel function for servo error signal
•
Auto gain control function for servo loop
•
E:F balance, focus bias adjustment function
•
Surf jump function supporting micro two-axis
•
Tracking filter: 6 stages
Focus filter: 5 stages
Preliminary
80 pin QFP (Plastic)
Applications
CD players
Structure
Silicon gate CMOS IC
Absolute Maximum Ratings
•
Supply voltage
V
DD
–0.5 to +4.6
V
–0.5 to +4.6
V
•
Input voltage
V
I
(V
SS
– 0.5V to V
DD
+ 0.5V)
•
Output voltage
V
O
–0.5 to +4.6
V
(V
SS
– 0.5V to V
DD
+ 0.5V)
•
Storage temperature Tstg
–55 to +150
°C
•
Supply voltage difference
V
SS
– AV
SS
–0.3 to +0.3
V
V
DD
– AV
DD
–0.3 to +0.3
V
Note)
AV
DD
includes XV
DD
and AV
SS
includes XV
SS
.
Recommended Operating Conditions
2.7 to 3.6
•
Supply voltage
V
DD
•
Operating temperature
Topr
–20 to +75
Input/Output Capacitance
•
Input pin
C
I
•
Output pin
C
O
•
I/O pin
C
I/O
Note)
Measurement conditions
9 (Max.)
11 (Max.)
11 (Max.)
V
DD
= V
I
= 0V
f
M
= 1MHz
V
°C
pF
pF
pF
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
PE00326-PS
SONY [ SONY CORPORATION ]
