CXD3142R
Pin
No.
70
71
72
73
74
75
76
77
78
79
80
I:
O:
I/O:
Symbol
S0 (FLD)
S1 (VD)
S2 (HD)
XRST
V
DD
4
NTPAL
TEST
V
SS
4
PBLK
CLPDM
CLP0
I/O
O/Z
O/Z
I
—
I
I
—
O
O
O
Description
Sync signal
Power
supply
Sync signal output 0. (FLD signal)
Sync signal output 2. (HD signal)
Reset input. (Low: reset, High: normal operation)
Power supply for Logic. (+3.3V)
TV mode switching. (Low: NTSC, High: PAL)
Chip test input. Low fixed at normal operation.
GND
Preblanking pulse output.
Dummy data clamp pulse output.
Optical black clamp pulse output.
O/I/Z Sync signal output 1. (VD signal)/VD signal input for LL
V
DD
CMOS level input
CMOS level output
Bidirectional input/output
O/Z: Tri-state output
I (A): Analog input
O (A): Analog output
O/I/Z: Bidirectional input/output with Tri-state
–6–
S/H