ILX558K
Clock Pulse Recommended Timing
Item
φROG, φ1 pulse timing
Symbol
t1
Min.
50
3
Typ.
100
5
Max.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
φROG pulse high level period
φROG, φ1 pulse timing
t2
t3
1
2
φROG pulse rise time
t4
0
5
φROG pulse fall time
t5
0
5
φ1 pulse rise time/φ2 pulse fall time
φ1 pulse fall time/φ2 pulse rise time
φRS pulse high level period
φRS pulse rise time
t6
0
20
20
t7
0
1
t8
30
0
50
20
t9
φRS pulse fall time
t10
t11
t12
t13
t14
t15
t16
t17
0
20
50
—
—
30
10
5
Signal output delay time
φCLP pulse high level period
φCLP pulse timing
20
100
100
50
φCLP pulse rise time
φCLP pulse fall time
0
20
0
20
1
These timing are the recommended condition under fφRS = 1MHz.
– 6 –
SONY [ SONY CORPORATION ]
