1.25 Gbps Single Mode SFF LC Transceiver
C-13-1250-F-SLC(2)
Recommended Circuit Schematic
C-13-1250C-F-SLC(2)
TRANSCEIVER INPUTS
TERMINATE AT
Vcc(+3.3V)
Z=50
TD-
100
LVPECL
Z=50
TD
10
TD-
9
TD+
8
TxDIS
7
TxGND
6
1
H
130
Vcc(+3.3V)
C3
130
TxVcc
Tx
Rx
C2
10
F
RxGND
RxVcc
RD+
SD
RD-
1
H
C1
Vcc(+3.3V)
RD+
1
2
3
4
5
Z=50
100
RD-
LVPECL
Z=50
130
130
Z=50
SD
NOTE:C1=C2=C3=100nF
TERMINATE AT
DEVICE INPUTS
The split-loaded terminations for ECL signals need to be located at the input of devices receiving those ECL signals.
The power supply filtering is required for good EMI performance. Use short tracks from the inductor L1/L2 to the module Rx Vcc.
A GND plane under the module is required for good EMI and sensitivity performance.
Figure 1c: Recommended Transceiver and Receive Data Terminations (DC-coupled)
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6
LUMNDS828-Apr2406
Rev A.1