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    AM29DL640H70WHI 参数 Datasheet PDF下载

    AM29DL640H70WHI图片预览
    型号： AM29DL640H70WHI
    PDF下载： 下载PDF文件 查看货源
    内容描述： 64兆位（8M ×8位/ 4米x 16位） CMOS 3.0伏只，同步读/写闪存 [64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory]
    分类和应用： 闪存存储内存集成电路
    文件页数/大小： 54 页 / 1243 K
    品牌： SPANSION [ SPANSION ]
     浏览型号AM29DL640H70WHI的Datasheet PDF文件第1页浏览型号AM29DL640H70WHI的Datasheet PDF文件第2页浏览型号AM29DL640H70WHI的Datasheet PDF文件第3页浏览型号AM29DL640H70WHI的Datasheet PDF文件第4页浏览型号AM29DL640H70WHI的Datasheet PDF文件第6页浏览型号AM29DL640H70WHI的Datasheet PDF文件第7页浏览型号AM29DL640H70WHI的Datasheet PDF文件第8页浏览型号AM29DL640H70WHI的Datasheet PDF文件第9页  
    TABLE OF CONTENTS
    Product Selector Guide . . . . . . . . . . . . . . . . . . . . .
    Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .
    Connection Diagrams . . . . . . . . . . . . . . . . . . . . . .
    Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . .
    Ordering Information . . . . . . . . . . . . . . . . . . . . . . .
    Device Bus Operations . . . . . . . . . . . . . . . . . . . . .
    4
    4
    5
    6
    7
    8
    DQ6: Toggle Bit I .................................................................... 29
    Figure 7. Toggle Bit Algorithm........................................................ 29
    DQ2: Toggle Bit II ................................................................... 30
    Reading Toggle Bits DQ6/DQ2 ............................................... 30
    DQ5: Exceeded Timing Limits ................................................ 30
    DQ3: Sector Erase Timer ....................................................... 30
    Table 13. Write Operation Status ................................................... 31
    Table 1. Am29DL640H Device Bus Operations ................................8
    Requirements for Reading Array Data ..................................... 8
    Writing Commands/Command Sequences .............................. 9
    Accelerated Program Operation ............................................... 9
    Autoselect Functions ................................................................ 9
    Simultaneous Read/Write Operations with Zero Latency ......... 9
    Automatic Sleep Mode ........................................................... 10
    RESET#: Hardware Reset Pin ............................................... 10
    Output Disable Mode .............................................................. 10
    Table 2. Am29DL640H Sector Architecture ....................................10
    Table 3. Bank Address ....................................................................13
    Table 5. Am29DL640H Autoselect Codes, (High Voltage Method) 14
    Table 6. Am29DL640H Boot Sector/Sector Block Addresses for
    Protection/Unprotection ...................................................................15
    Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 32
    Figure 8. Maximum Negative Overshoot Waveform ...................... 32
    Figure 9. Maximum Positive Overshoot Waveform........................ 32
    DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 33
    Figure 10. I
    CC1
    Current vs. Time (Showing Active and
    Automatic Sleep Currents) ............................................................. 34
    Figure 11. Typical I
    CC1
    vs. Frequency ............................................ 34
    Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 35
    Figure 12. Test Setup.................................................................... 35
    Figure 13. Input Waveforms and Measurement Levels ................. 35
    AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 36
    Read-Only Operations ........................................................... 36
    Figure 14. Read Operation Timings ............................................... 36
    Write Protect (WP#) ................................................................ 15
    Table 7. WP#/ACC Modes ..............................................................16
    Hardware Reset (RESET#) .................................................... 37
    Figure 15. Reset Timings ............................................................... 37
    Temporary Sector Unprotect .................................................. 16
    Figure 1. Temporary Sector Unprotect Operation........................... 16
    Figure 2. In-System Sector Protect/Unprotect Algorithms .............. 17
    Word/Byte Configuration (BYTE#) .......................................... 38
    Figure 16. BYTE# Timings for Read Operations............................ 38
    Figure 17. BYTE# Timings for Write Operations............................ 38
    Secured Silicon Sector
    Flash Memory Region ............................................................ 18
    Figure 3. Secured Silicon Sector Protect Verify.............................. 19
    Erase and Program Operations .............................................. 39
    Figure 18. Program Operation Timings..........................................
    Figure 19. Accelerated Program Timing Diagram..........................
    Figure 20. Chip/Sector Erase Operation Timings ..........................
    Figure 21. Back-to-back Read/Write Cycle Timings ......................
    Figure 22. Data# Polling Timings (During Embedded Algorithms).
    Figure 23. Toggle Bit Timings (During Embedded Algorithms)......
    Figure 24. DQ2 vs. DQ6.................................................................
    40
    40
    41
    42
    42
    43
    43
    Hardware Data Protection ...................................................... 19
    Low VCC Write Inhibit ............................................................ 19
    Write Pulse “Glitch” Protection ............................................... 19
    Logical Inhibit .......................................................................... 19
    Power-Up Write Inhibit ............................................................ 19
    Common Flash Memory Interface (CFI) . . . . . . . 19
    Command Definitions . . . . . . . . . . . . . . . . . . . . . 23
    Reading Array Data ................................................................ 23
    Reset Command ..................................................................... 23
    Autoselect Command Sequence ............................................ 23
    Enter Secured Silicon Sector/Exit Secured Silicon Sector
    Command Sequence .............................................................. 23
    Byte/Word Program Command Sequence ............................. 24
    Unlock Bypass Command Sequence ..................................... 24
    Figure 4. Program Operation .......................................................... 25
    Temporary Sector Unprotect .................................................. 44
    Figure 25. Temporary Sector Unprotect Timing Diagram .............. 44
    Figure 26. Sector/Sector Block Protect and
    Unprotect Timing Diagram ............................................................. 45
    Alternate CE# Controlled Erase and Program Operations ..... 46
    Figure 27. Alternate CE# Controlled Write (Erase/Program)
    Operation Timings.......................................................................... 47
    Chip Erase Command Sequence ........................................... 25
    Sector Erase Command Sequence ........................................ 25
    Figure 5. Erase Operation............................................................... 26
    Erase Suspend/Erase Resume Commands ........................... 26
    Write Operation Status . . . . . . . . . . . . . . . . . . . . 28
    DQ7: Data# Polling ................................................................. 28
    Figure 6. Data# Polling Algorithm ................................................... 28
    Erase And Programming Performance. . . . . . . . 48
    Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 48
    TSOP & BGA Pin Capacitance. . . . . . . . . . . . . . . 48
    Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
    FBE063—63-Ball Fine-Pitch Ball Grid Array (fBGA)
    12 x 11 mm package .............................................................. 49
    TS 048—48-Pin Standard TSOP ............................................ 50
    Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 51
    TS 048—48-Pin Standard TSOP. . . . . . . . . . . . . . 52
    Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 53
    June 7, 2005
    Am29DL640H
    3

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