AC CHARACTERISTICS
t
AHT
Addresses
t
AHT
t
ASO
CE#
t
OEH
WE#
t
OEPH
OE#
t
DH
DQ6/DQ2
Valid Data
Valid
Status
t
AS
t
CEPH
t
OE
Valid
Status
Valid
Status
Valid Data
(first read)
RY/BY#
(second read)
(stops toggling)
Note:
VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command
sequence, last status read cycle, and array data read cycle
Figure 21.
Toggle Bit Timings (During Embedded Algorithms)
Enter
Embedded
Erasing
WE#
Erase
Suspend
Erase
Enter Erase
Suspend Program
Erase
Suspend
Program
Erase
Resume
Erase Suspend
Read
Erase
Erase
Complete
Erase Suspend
Read
DQ6
DQ2
Note:
DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE#
or CE# to toggle DQ2 and DQ6.
Figure 22.
DQ2 vs. DQ6
November 15, 2004
Am29LV320D
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SPANSION [ SPANSION ]
