D A T A S H E E T
Command Definitions
Table 8.
Command
Sequence
(Note 1)
Read (Note 5)
Reset (Note 6)
Autoselect (Note 7)
Manufacturer ID
Device ID (Note 8)
SecSi™ Sector Factory Protect
(Note 9)
Sector Group Protect Verify
(Note 10)
Cycles
Command Definitions (x16 Mode, BYTE# = V
IH
)
Bus Cycles (Notes 2–5)
First
Second
Addr
Data
Third
Addr
Data
Fourth
Addr
Data
Fifth
Addr
Data
Sixth
Addr
Data
Addr
RA
XXX
555
555
555
555
555
555
555
555
SA
555
555
XXX
XXX
555
555
XXX
XXX
55
Data
RD
F0
AA
AA
AA
AA
AA
AA
AA
AA
29
AA
AA
A0
90
AA
AA
B0
30
98
1
1
4
6
4
4
3
4
4
6
1
3
3
2
2
6
6
1
1
1
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
PA
XXX
2AA
2AA
55
55
55
55
55
55
55
55
55
55
PD
00
55
55
555
555
555
555
555
555
555
SA
555
555
90
90
90
90
88
90
A0
25
F0
20
X00
X01
X03
(SA)X02
0001
227E
(Note 10)
00/01
X0E
220C
X0F
2201
Enter SecSi Sector Region
Exit SecSi Sector Region
Program
Write to Buffer (Note 11)
Program Buffer to Flash
Write to Buffer Abort Reset (Note 12)
Unlock Bypass
Unlock Bypass Program (Note 13)
Unlock Bypass Reset (Note 14)
Chip Erase
Sector Erase
Program/Erase Suspend (Note 15)
Program/Erase Resume (Note 16)
CFI Query (Note 17)
Legend:
XXX
PA
SA
00
PD
WC
PA
PD
WBL
PD
555
555
80
80
555
555
AA
AA
2AA
2AA
55
55
555
SA
10
30
X = Don’t care
RA = Read Address of memory location to be read.
RD = Read Data read from location RA during read operation.
PA = Program Address . Addresses latch on falling edge of WE# or
CE# pulse, whichever happens later.
PD = Program Data for location PA. Data latches on rising edge of
WE# or CE# pulse, whichever happens first.
SA = Sector Address of sector to be verified (in autoselect mode) or
erased. Address bits A21–A15 uniquely select any sector.
WBL = Write Buffer Location. Address must be within same write
buffer page as PA.
WC = Word Count. Number of write buffer locations to load minus 1.
Notes:
1.
2.
3.
4.
See
Table 1
for description of bus operations.
All values are in hexadecimal.
Shaded cells indicate read cycles. All others are write cycles.
During unlock and command cycles, when lower address bits are
555 or 2AA as shown in table, address bits above A11 and data
bits above DQ7 are don’t care.
No unlock or command cycles required when device is in read
mode.
Reset command is required to return to read mode (or to
erase-suspend-read mode if previously in Erase Suspend) when
device is in autoselect mode, or if DQ5 goes high while device is
providing status information.
Fourth cycle of the autoselect command sequence is a read
cycle. Data bits DQ15–DQ8 are don’t care. Except for RD, PD
and WC. See
Autoselect Command Sequence
section for more
information.
Device ID must be read in three cycles.
9.
If WP# protects highest address sector, data is 98h for factory
locked and 18h for not factory locked. If WP# protects lowest
address sector, data is 88h for factory locked and 08h for not
factor locked.
Data is 00h for an unprotected sector group and 01h for a
protected sector group.
Total number of cycles in command sequence is determined by
number of words written to write buffer. Maximum number of
cycles in command sequence is 21, including "Program Buffer to
Flash" command.
Command sequence resets device for next command after
aborted write-to-buffer operation.
Unlock Bypass command is required prior to Unlock Bypass
Program command.
Unlock Bypass Reset command is required to return to read
mode when device is in unlock bypass mode.
System may read and program in non-erasing sectors, or enter
autoselect mode, when in Erase Suspend mode. Erase Suspend
command is valid only during a sector erase operation.
Erase Resume command is valid only during Erase Suspend
mode.
10.
11.
5.
6.
12.
13.
14.
15.
7.
8.
16.
December 14, 2005
Am29LV640MH/L
33
SPANSION [ SPANSION ]
