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MBM29LV400TC-70PFTN 参数 Datasheet PDF下载

MBM29LV400TC-70PFTN图片预览
型号: MBM29LV400TC-70PFTN
PDF下载: 下载PDF文件 查看货源
内容描述: FLASH存储器CMOS 4M ( 512K ×8 / 256K ×16 )位 [FLASH MEMORY CMOS 4M (512K X 8/256K X 16) BIT]
分类和应用: 存储内存集成电路光电二极管
文件页数/大小: 58 页 / 610 K
品牌: SPANSION [ SPANSION ]
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MBM29LV400TC-55/70/90/MBM29LV400BC-55/70/90  
The manufacturer and device codes may also be read via the command register, for instances when the  
MBM29LV400TC/BC are erased or programmed in a system without access to high voltage on the A9 pin. The  
command sequence is illustrated in “MBM29LV400TC/400BC Standard Command Definitions Table” (DEVICE  
BUS OPERATIONS). (Refer to “2. Autoselect Command” in COMMAND DEFINITIONS.)  
Byte 0 (A0 = VIL) represents the manufacturer’s code (Fujitsu = 04h) and (A0 = VIH) represents the device identifier  
code (MBM29LV400TC = B9h and MBM29LV400BC = BAh for ×8 mode; MBM29LV400TC = 22B9h and  
MBM29LV400BC = 22BAh for ×16 mode). These two bytes/words are given in “MBM29LV400TC/400BC Sector  
Protection Verify Autoselect Codes Table” and “Extended Autoselect Code Table” (DEVICE BUS  
OPERATIONS). All identifiers for manufactures and device will exhibit odd parity with DQ7 defined as the parity  
bit. In order to read the proper device codes when executing the autoselect, A1 must be VIL. (See  
“MBM29LV400TC/400BC Sector Protection Verify Autoselect Codes Table” and “Extended Autoselect Code  
Table” in DEVICE BUS OPERATIONS.)  
6. Write  
Device erasure and programming are accomplished via the command register. The contents of the register serve  
as inputs to the internal state machine. The state machine outputs dictate the function of the device.  
The command register itself does not occupy any addressable memory location. The register is a latch used to  
store the commands, along with the address and data information needed to execute the command. The  
command register is written by bringing WE to VIL, while CE is at VIL and OE is at VIH. Addresses are latched on  
the falling edge of WE or CE, whichever happens later; while data is latched on the rising edge of WE or CE,  
whichever happens first. Standard microprocessor write timings are used.  
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters.  
7. Sector Protection  
The MBM29LV400TC/BC feature hardware sector protection. This feature will disable both program and erase  
operations in any number of sectors (0 through 10). The sector protection feature is enabled using programming  
equipment at the user’s site. The devices are shipped with all sectors unprotected. Alternatively, Fujitsu may  
program and protect sectors in the factory prior to shiping the device.  
To activate this mode, the programming equipment must force VID on address pin A9 and control pin OE, (suggest  
VID = 11.5 V), CE = VIL, and A6 = VIL. The sector addresses ( A17, A16, A15, A14, A13, and A12) should be set to the  
sector to be protected. “Sector Address Tables (MBM29LV400TC/BC)” in FLEXIBLE SECTOR-ERASE  
ARCHITECTURE define the sector address for each of the eleven (11) individual sectors. Programming of the  
protection circuitry begins on the falling edge of the WE pulse and is terminated with the rising edge of the same.  
Sector addresses must be held constant during the WE pulse. See “13. AC Waveforms for Sector Protection  
Timing Diagram” in TIMING DIAGRAM and “5. Sector Protection Algorithm” in FLOW CHART for sector  
protection waveforms and algorithm.  
To verify programming of the protection circuitry, the programming equipment must force VID on address pin A9  
with CE and OE at VIL and WE at VIH. Scanning the sector addresses ( A17, A16, A15, A14, A13, and A12) while (A6,  
A1, A0) = (0, 1, 0) will produce a logical “1” code at device output DQ0 for a protected sector. Otherwise the  
devices will read 00h for unprotected sector. In this mode, the lower order addresses, except for A0, A1, and A6  
are DON’T CARES. Address locations with A1 = VIL are reserved for Autoselect manufacturer and device codes.  
A-1 requires to apply to VIL on byte mode.  
ItisalsopossibletodetermineifasectorisprotectedinthesystembywritinganAutoselectcommand. Performing  
a read operation at the address location XX02h, where the higher order addresses (A17, A16, A15, A14, A13, and  
A12) are the desired sector address will produce a logical “1” at DQ0 for a protected sector. See “MBM29LV400TC/  
400BC Sector Protection Verify Autoselect Codes Table” and “Extended Autoselect Code Table” in DEVICE  
BUS OPERATIONS for Autoselect codes.  
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